JPH0587024B2 - - Google Patents

Info

Publication number
JPH0587024B2
JPH0587024B2 JP60147846A JP14784685A JPH0587024B2 JP H0587024 B2 JPH0587024 B2 JP H0587024B2 JP 60147846 A JP60147846 A JP 60147846A JP 14784685 A JP14784685 A JP 14784685A JP H0587024 B2 JPH0587024 B2 JP H0587024B2
Authority
JP
Japan
Prior art keywords
path
pad
power supply
pads
negative power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP60147846A
Other languages
English (en)
Japanese (ja)
Other versions
JPS628551A (ja
Inventor
Michiko Kikuchi
Hisao Tateishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP60147846A priority Critical patent/JPS628551A/ja
Publication of JPS628551A publication Critical patent/JPS628551A/ja
Publication of JPH0587024B2 publication Critical patent/JPH0587024B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/611—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using diodes as protective elements

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP60147846A 1985-07-04 1985-07-04 半導体装置 Granted JPS628551A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60147846A JPS628551A (ja) 1985-07-04 1985-07-04 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60147846A JPS628551A (ja) 1985-07-04 1985-07-04 半導体装置

Publications (2)

Publication Number Publication Date
JPS628551A JPS628551A (ja) 1987-01-16
JPH0587024B2 true JPH0587024B2 (enrdf_load_stackoverflow) 1993-12-15

Family

ID=15439575

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60147846A Granted JPS628551A (ja) 1985-07-04 1985-07-04 半導体装置

Country Status (1)

Country Link
JP (1) JPS628551A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2509596Y2 (ja) * 1992-03-16 1996-09-04 ヘルシー寝装株式会社 寝 具
JPH0619616U (ja) * 1992-03-16 1994-03-15 ヘルシー寝装株式会社 寝 具

Also Published As

Publication number Publication date
JPS628551A (ja) 1987-01-16

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees