JPH0561827B2 - - Google Patents

Info

Publication number
JPH0561827B2
JPH0561827B2 JP58121653A JP12165383A JPH0561827B2 JP H0561827 B2 JPH0561827 B2 JP H0561827B2 JP 58121653 A JP58121653 A JP 58121653A JP 12165383 A JP12165383 A JP 12165383A JP H0561827 B2 JPH0561827 B2 JP H0561827B2
Authority
JP
Japan
Prior art keywords
data
transmission
bit
memory
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58121653A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6014555A (ja
Inventor
Keijiro Ishii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Facom Corp
Original Assignee
Fuji Facom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Facom Corp filed Critical Fuji Facom Corp
Priority to JP58121653A priority Critical patent/JPS6014555A/ja
Publication of JPS6014555A publication Critical patent/JPS6014555A/ja
Publication of JPH0561827B2 publication Critical patent/JPH0561827B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/50—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication
    • H04L12/52—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication using time division techniques
    • H04L12/525—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication using time division techniques involving a stored program control

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)
JP58121653A 1983-07-06 1983-07-06 直列デ−タ受信装置 Granted JPS6014555A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58121653A JPS6014555A (ja) 1983-07-06 1983-07-06 直列デ−タ受信装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58121653A JPS6014555A (ja) 1983-07-06 1983-07-06 直列デ−タ受信装置

Publications (2)

Publication Number Publication Date
JPS6014555A JPS6014555A (ja) 1985-01-25
JPH0561827B2 true JPH0561827B2 (enrdf_load_stackoverflow) 1993-09-07

Family

ID=14816571

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58121653A Granted JPS6014555A (ja) 1983-07-06 1983-07-06 直列デ−タ受信装置

Country Status (1)

Country Link
JP (1) JPS6014555A (enrdf_load_stackoverflow)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6011865B2 (ja) * 1977-01-28 1985-03-28 富士通株式会社 時分割多重処理方式
JPS5789358A (en) * 1980-11-22 1982-06-03 Nippon Telegr & Teleph Corp <Ntt> Line control system
JPS5819062A (ja) * 1981-07-27 1983-02-03 Nec Corp 回線アダプタ

Also Published As

Publication number Publication date
JPS6014555A (ja) 1985-01-25

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