JPH0551179B2 - - Google Patents

Info

Publication number
JPH0551179B2
JPH0551179B2 JP61011770A JP1177086A JPH0551179B2 JP H0551179 B2 JPH0551179 B2 JP H0551179B2 JP 61011770 A JP61011770 A JP 61011770A JP 1177086 A JP1177086 A JP 1177086A JP H0551179 B2 JPH0551179 B2 JP H0551179B2
Authority
JP
Japan
Prior art keywords
substrate
semiconductor chip
electrode
electrode connection
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP61011770A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62169433A (ja
Inventor
Hironori Murakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujifilm Business Innovation Corp
Original Assignee
Fuji Xerox Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Xerox Co Ltd filed Critical Fuji Xerox Co Ltd
Priority to JP61011770A priority Critical patent/JPS62169433A/ja
Publication of JPS62169433A publication Critical patent/JPS62169433A/ja
Publication of JPH0551179B2 publication Critical patent/JPH0551179B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Wire Bonding (AREA)
JP61011770A 1986-01-22 1986-01-22 半導体装置の製造方法 Granted JPS62169433A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61011770A JPS62169433A (ja) 1986-01-22 1986-01-22 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61011770A JPS62169433A (ja) 1986-01-22 1986-01-22 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS62169433A JPS62169433A (ja) 1987-07-25
JPH0551179B2 true JPH0551179B2 (enrdf_load_stackoverflow) 1993-07-30

Family

ID=11787208

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61011770A Granted JPS62169433A (ja) 1986-01-22 1986-01-22 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS62169433A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0720958U (ja) * 1993-09-29 1995-04-18 陽 石川 開閉式遮蔽シート

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2647047B2 (ja) * 1995-03-01 1997-08-27 日本電気株式会社 半導体素子のフリップチップ実装方法およびこの実装方法に用いられる接着剤
JP3801674B2 (ja) 1995-12-15 2006-07-26 松下電器産業株式会社 電子部品の実装方法
JP3065549B2 (ja) 1997-01-09 2000-07-17 富士通株式会社 半導体チップ部品の実装方法
US20020014688A1 (en) * 1999-03-03 2002-02-07 Suresh Ramalingam Controlled collapse chip connection (c4) integrated circuit package which has two dissimilar underfill materials
JP2000299553A (ja) * 1999-04-13 2000-10-24 Ricoh Microelectronics Co Ltd 電子回路基板製造方法
CN112968109A (zh) * 2020-11-27 2021-06-15 重庆康佳光电技术研究院有限公司 一种驱动背板及其制作方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56167340A (en) * 1980-05-27 1981-12-23 Toshiba Corp Junction of semicondctor pellet with substrate
JPS60262430A (ja) * 1984-06-08 1985-12-25 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPH0682708B2 (ja) * 1985-12-05 1994-10-19 松下電器産業株式会社 半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0720958U (ja) * 1993-09-29 1995-04-18 陽 石川 開閉式遮蔽シート

Also Published As

Publication number Publication date
JPS62169433A (ja) 1987-07-25

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Legal Events

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