JPH054754B2 - - Google Patents
Info
- Publication number
- JPH054754B2 JPH054754B2 JP63078612A JP7861288A JPH054754B2 JP H054754 B2 JPH054754 B2 JP H054754B2 JP 63078612 A JP63078612 A JP 63078612A JP 7861288 A JP7861288 A JP 7861288A JP H054754 B2 JPH054754 B2 JP H054754B2
- Authority
- JP
- Japan
- Prior art keywords
- data
- port
- output
- memory
- memories
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Static Random-Access Memory (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63078612A JPH01251387A (ja) | 1988-03-30 | 1988-03-30 | マルチポートメモリ装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63078612A JPH01251387A (ja) | 1988-03-30 | 1988-03-30 | マルチポートメモリ装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01251387A JPH01251387A (ja) | 1989-10-06 |
| JPH054754B2 true JPH054754B2 (enExample) | 1993-01-20 |
Family
ID=13666702
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63078612A Granted JPH01251387A (ja) | 1988-03-30 | 1988-03-30 | マルチポートメモリ装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01251387A (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3871813B2 (ja) | 1998-08-10 | 2007-01-24 | 株式会社ルネサステクノロジ | マルチポートメモリ、データプロセッサ及びデータ処理システム |
| JP2009266176A (ja) * | 2008-04-30 | 2009-11-12 | Digital Electronics Corp | メモリ制御システム |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51129454U (enExample) * | 1975-04-07 | 1976-10-19 |
-
1988
- 1988-03-30 JP JP63078612A patent/JPH01251387A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH01251387A (ja) | 1989-10-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5239642A (en) | Data processor with shared control and drive circuitry for both breakpoint and content addressable storage devices | |
| US4930066A (en) | Multiport memory system | |
| US5341500A (en) | Data processor with combined static and dynamic masking of operand for breakpoint operation | |
| JPS62182862A (ja) | 大容量メモリおよび該大容量メモリを具備するマルチプロセツサシステム | |
| JPH0479026B2 (enExample) | ||
| US5001665A (en) | Addressing technique for providing read, modify and write operations in a single data processing cycle with serpentine configured RAMs | |
| JPH054754B2 (enExample) | ||
| JPH054755B2 (enExample) | ||
| JPS61256478A (ja) | 並列処理計算機 | |
| JPS61235969A (ja) | メモリ装置 | |
| JPS62119661A (ja) | 共有メモリに対するアクセス管理方式 | |
| JP2514473B2 (ja) | 並列処理装置 | |
| JP3436497B2 (ja) | メモリアクセス回路 | |
| JPH07121483A (ja) | 共有メモリアクセス制御回路 | |
| JPS6258349A (ja) | 複数ポ−トメモリ−装置 | |
| JPS63201810A (ja) | 情報処理システムの時刻方式 | |
| JPS62229452A (ja) | 周辺モジユ−ルアクセス方式 | |
| JPH0563825B2 (enExample) | ||
| JPS61161560A (ja) | メモリ装置 | |
| JPH0528769A (ja) | デユアルポートメモリ | |
| JPH01108646A (ja) | テンプレートマッチング回路 | |
| JPS61224050A (ja) | メモリアクセス回路 | |
| JPH04190420A (ja) | 並列演算回路 | |
| JPH0373014A (ja) | 磁気ディスクコントロール装置 | |
| JPH02159623A (ja) | マイクロコンピュータ |