JPH0513372B2 - - Google Patents

Info

Publication number
JPH0513372B2
JPH0513372B2 JP60089315A JP8931585A JPH0513372B2 JP H0513372 B2 JPH0513372 B2 JP H0513372B2 JP 60089315 A JP60089315 A JP 60089315A JP 8931585 A JP8931585 A JP 8931585A JP H0513372 B2 JPH0513372 B2 JP H0513372B2
Authority
JP
Japan
Prior art keywords
insulating film
interlayer insulating
forming
wiring
alignment mark
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60089315A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61248427A (ja
Inventor
Yoshiaki Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP60089315A priority Critical patent/JPS61248427A/ja
Publication of JPS61248427A publication Critical patent/JPS61248427A/ja
Publication of JPH0513372B2 publication Critical patent/JPH0513372B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
JP60089315A 1985-04-25 1985-04-25 多層配線の形成方法 Granted JPS61248427A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60089315A JPS61248427A (ja) 1985-04-25 1985-04-25 多層配線の形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60089315A JPS61248427A (ja) 1985-04-25 1985-04-25 多層配線の形成方法

Publications (2)

Publication Number Publication Date
JPS61248427A JPS61248427A (ja) 1986-11-05
JPH0513372B2 true JPH0513372B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-02-22

Family

ID=13967231

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60089315A Granted JPS61248427A (ja) 1985-04-25 1985-04-25 多層配線の形成方法

Country Status (1)

Country Link
JP (1) JPS61248427A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63307736A (ja) * 1987-06-10 1988-12-15 Hitachi Ltd イオンビ−ム加工方法
JPS63237520A (ja) * 1987-03-26 1988-10-04 Nec Corp 半導体素子製造方法
JPH01103834A (ja) * 1987-10-16 1989-04-20 Sanyo Electric Co Ltd 半導体装置の製造方法
JPH03174728A (ja) * 1989-12-04 1991-07-29 Matsushita Electron Corp 半導体装置の製造方法
US7355675B2 (en) 2004-12-29 2008-04-08 Asml Netherlands B.V. Method for measuring information about a substrate, and a substrate for use in a lithographic apparatus
TWI445225B (zh) * 2011-11-07 2014-07-11 Voltafield Technology Corp 磁阻元件結構形成方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6035515A (ja) * 1983-08-08 1985-02-23 Hitachi Micro Comput Eng Ltd 半導体装置の製造法

Also Published As

Publication number Publication date
JPS61248427A (ja) 1986-11-05

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term