JPH0513372B2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for forming multilayer wiring, and more particularly to a method for forming multilayer wiring in a semiconductor integrated circuit formed by providing an insulating film between metal wirings. .

[Conventional technology]

Conventionally, when using the reduction projection exposure method as an alignment exposure method in multilayer wiring of semiconductor devices such as integrated circuits, the position of the wafer is detected using laser light and the wafer is aligned with the projected image of the mask. Alignment marks are formed on the top,
Silicon substrates, polycrystalline silicon, aluminum, etc. were used as the marks.

FIGS. 2a to 2d are cross-sectional views shown in order of steps to explain an example of a conventional method for forming multilayer wiring. 2a to 2d, a method for forming a two-layer aluminum wiring using polyimide resin as an interlayer insulating film will be described.

First, as shown in FIG. 2a, a first layer of aluminum electrode wiring 23 is formed on a silicon substrate 21 whose surface is covered with a silicon oxide film 22, and alignment marks 24 are formed at the same time. Next, in order to form a desired opening in the polyimide resin 25, the polyimide resin 25 is covered with a photoresist film 26, and a laser beam 27 is irradiated onto the alignment mark portion 24, which is diffusely reflected by the stepped portion of the mark formed of aluminum. Among the laser beams reflected at a certain angle, for example, at an angle of 45 degrees, the laser beam 28 is detected by a photodiode 29, and the position where the intensity peaks is determined as the alignment position between the projected image of the mask and the wafer. Perform exposure.

Next, as shown in FIG. 2b, the photoresist film 26 is developed, and openings are formed in the photoresist film 26 on the first layer aluminum electrode wiring area.

Next, as shown in FIG. 2c, using the photoresist film 26 as a mask, the polyimide resin film 25 is
An opening 30 reaching the first layer aluminum electrode wiring 23 is provided, and then the photoresist film 26 is removed.

Next, as shown in FIG. 2d, an aluminum film 31 is formed on the entire surface of the silicon substrate by sputtering.
After that, it is covered with a photoresist film 32, alignment exposure is performed to provide a second layer of aluminum electrode wiring, and after development, a second layer of wiring is formed by etching.

[Problem that the invention seeks to solve]

However, in the methods shown in FIGS. 2a to 2d, in the alignment exposure for providing the second layer aluminum electrode wiring, at this time, the alignment mark part 2
4 is flattened with polyimide resin, the aluminum film 32 does not have a mark step, and the alignment laser beam 27 cannot pass through the conductor and is only diffusely reflected on the surface of the flat aluminum film 31 to determine the position. This results in the disadvantage that alignment becomes impossible. Furthermore, even if the stepped portions of the first layer of aluminum wiring are smoothed by coating with silica film, it is difficult to judge the peak of the reflected light because the stepped portions are smooth, even if they are not completely flattened. It has the disadvantage that it occurs frequently.
Furthermore, even if a bias sputtered oxide film is used as an interlayer insulating film, the surface will be flattened, making it difficult to detect the position of the mark using a laser beam, as described above.

The present invention eliminates the above-mentioned drawbacks of the conventional technology, makes it possible to reduce alignment errors even when the steps of the interlayer insulating film are made smooth, and allows the upper layer metal wiring to be formed with high precision even when completely flattened. It is an object of the present invention to provide a method for forming multilayer wiring, which allows easy formation of fine wiring.

[Means for solving problems]

A feature of the present invention is that the multilayer wiring of a semiconductor integrated circuit has an interlayer insulating film on a lower wiring, and an upper wiring on the interlayer insulating film that connects to the lower wiring through an opening in the interlayer insulating film. In the method of forming by an exposure method, the step of forming a shape of the lower layer wiring from a first conductive material and simultaneously forming a first positioning mark from the first conductive material; forming the interlayer insulating film over the first alignment mark; aligning with the first alignment mark and forming the opening in the interlayer insulating film; a step of forming a recess that will become a second alignment mark from a surface portion of the interlayer insulating film at a position different from the position on the alignment mark; a step of depositing a second conductive material constituting the upper layer wiring on the entire surface including the inside of the recess, and a step of depositing the second conductive material forming the upper layer wiring on the entire surface including the inside of the recess, and forming the second conductive material corresponding to the recess of the interlayer insulating film that becomes the second alignment mark.
A method for forming a multilayer wiring, in which the upper layer wiring, which is connected to the lower layer wiring through the opening, is formed from the second conductive material by performing alignment using a stepped portion on the surface of the conductive material as an alignment mark. be.

〔Example〕

Next, the present invention will be explained with reference to the drawings. FIGS. 1A to 1E are cross-sectional views shown in order of steps to explain an embodiment of the present invention. In this embodiment, a method for forming a two-layer aluminum wiring when polyimide resin is used for the interlayer insulating film will be described.

First, as shown in FIG. 1a, a first layer of aluminum electrode wiring 3 is formed on a silicon substrate 1 whose surface is covered with a silicon oxide film 2. As shown in FIG. At the same time, alignment marks 4 for reduction projection exposure are provided using aluminum. Next, after forming an interlayer insulating film with polyimide resin 5, this polyimide resin film 5
Then, in order to provide a desired opening that reaches the first layer of aluminum 3, it is covered with a photoresist 6 and a laser beam 7 is irradiated onto the mark portion 4, and the laser beam is diffusely reflected by the stepped portion of the mark 4 formed of aluminum. A photodiode 9 detects only the laser beam 8 reflected at a certain angle, for example, an angle of 45 degrees. The wafer is moved horizontally and the laser beam 8 detected by the photodiode 9
Exposure is performed by setting the position where the intensity of the mask is at its peak as the alignment position between the projected image of the mask and the wafer.

Next, as shown in FIG. 1B, the photoresist film 6 is developed and photoresist openings 10 are provided. At this time, a new alignment mark pattern 11 is provided at the same time. It is desirable that this mark 11 be provided at a different position from the alignment mark 4 that has been set up until now.

Next, as shown in FIG. 1c, using this photoresist film 6 as a mask, an opening 12 in the interlayer insulating film reaching the first layer aluminum electrode wiring 3 is provided in the polyimide resin film 5. An alignment mark 13 is formed. Next, the photoresist film 6 is removed.

Next, as shown in FIG. 1d, an aluminum film 14 is formed on the entire surface of the silicon substrate by sputtering.
A photoresist film 15 is further deposited. Then, alignment is performed by irradiating the alignment mark portion 13 newly provided on the polyimide resin film 5 with the laser beam 16. At this time, a similar step corresponding to the stepped portion of the polyimide resin is also formed on the surface of the aluminum film 14. The laser beam 16 is diffusely reflected by this step, and only the laser beam 17 that is diffusely reflected at an angle of 45 degrees is detected by the photodiode 9, and the position where the intensity peaks is determined by comparing the projected image of the mask and the wafer. Exposure is performed as the alignment position.

Next, as shown in FIG. 1e, using the developed photoresist film 15 as a mask, the aluminum film 15 is
The photoresist film 15 is removed by etching, and the second layer aluminum electrode wiring 18 is formed, thereby completing the aluminum two-layer wiring.

[Effects of the Invention] As described above, the present invention provides a method for forming an opening in an interlayer insulating film that reaches the underlying metal wiring when alignment exposure is performed using a reduction projection exposure method in forming multilayer wiring of a semiconductor element. By simultaneously forming alignment marks in the selective formation process, there is an effect that the upper layer metal wiring can be formed with high precision even if the interlayer insulating film is completely flattened.

In addition, not only when the interlayer insulating film is completely flattened, but also when the step part is smoothed and the mark part becomes unclear, it may cause malfunction during alignment. Malfunctions can be eliminated.

Furthermore, since the upper layer electrode wiring is aligned with the opening that reaches the lower layer electrode wiring, the margin between this opening and the upper layer electrode wiring can be reduced, making it easier to form fine wiring. It also has the advantage of being

[Brief explanation of the drawing]

1A to 1E are cross-sectional views shown in the order of steps to explain an embodiment of the present invention, and FIGS. 2A to 2D are cross-sectional views shown in the order of steps to explain the conventional method for forming multilayer wiring. It is. 1, 21... Silicon substrate, 2, 22... Silicon oxide film, 3, 23... First layer aluminum electrode wiring, 4, 24... Alignment mark, 5, 2
5... Polyimide resin, 6, 15, 26, 32...
...Photoresist film, 7,16,27...Laser beam for alignment, 8,17,28...Laser beam reflected at an angle of 45 degrees, 9,29...Photodiode, 10,11...Photo Resist opening, 12, 30...Interlayer insulating film opening, 13...
Interlayer insulating film alignment mark, 14, 31... Aluminum film, 18... Second layer aluminum electrode wiring.

Claims (1)

[Scope of Claims] 1. Reducing the multilayer wiring of a semiconductor integrated circuit that has an interlayer insulating film on a lower layer wiring, and has an upper layer wiring on the interlayer insulating film that connects to the lower layer wiring through an opening in the interlayer insulating film. In the method of forming by a projection exposure method, a step of simultaneously forming the lower wiring from a first conductive material and forming a first alignment mark from the first conductive material;
forming the interlayer insulating film from above the lower wiring to above the first alignment mark; and performing alignment using the first alignment mark, and forming the opening in the interlayer insulating film. At the same time, a second alignment mark is formed from a surface portion of the interlayer insulating film at a position different from the first alignment mark.
a step of forming a recess that will become an alignment mark; and a step of depositing a second conductive material constituting the upper layer wiring over the entire surface including the inside of the opening and the inside of the recess that will become the second alignment mark. Then, alignment is performed using a step on the surface of the second conductive material formed corresponding to the recess of the interlayer insulating film, which serves as the second alignment mark, to align the opening. A method for forming a multilayer wiring, characterized in that the upper layer wiring, which is connected to the lower layer wiring through the second conductive material, is formed into a shape from the second conductive material. 2. The method for forming a multilayer wiring according to claim 1, wherein the interlayer insulating film is an insulating film whose surface is flattened.