JP2002353117A - Manufacturing method of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem that the detected waveform for alignment to a metal plug of a photomask can easily reach the same level as the grain boundary detection waveform of aluminum causing the noise of the detection waveform, when the metal plug is buried in a via hole in an interlayer insulating film for forming aluminum wiring on it, the position accuracy in the aluminum wiring to the metal plug is deteriorated when the noise is detected, and the contact area between the aluminum wiring and metal plug is reduced, and contact resistance is increased. SOLUTION: By using a photomask, that makes a metal plug 7 project from the surface of an interlayer insulating film 4, and has a pattern formed in a shape for completely surrounding the metal plug 7 with a specific margin, the step of aluminum 8 and difference in the detection waveform of the grain of aluminum 8 are increased, and both waveforms can be identified clearly, thus improving the position accuracy in the aluminum wiring with respect to the metal plug 7.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a method of manufacturing a semiconductor device comprising an integrated circuit having multilayer wirings, and more particularly to an improvement in pattern accuracy in a photolithography process on an upper wiring side when interconnecting multilayer wirings.

[0002]

2. Description of the Related Art Conventionally, in a method of manufacturing a semiconductor device composed of an integrated circuit having multilayer metal wiring, a photomask and a pattern on a wafer are aligned with high precision in a photolithography process in order to increase the integration of wiring. Is one of the important factors.

A method of manufacturing a semiconductor device having a metal wiring will be described with reference to FIGS.

First, a base insulating film 102 serving as a wiring base is formed on a semiconductor substrate 101, and a base insulating film 10
The first aluminum wiring 103 is formed on the substrate 2.

Next, an interlayer insulating film 4 thicker than the first aluminum wiring 103 is deposited by using the CVD method,
The surface is flattened using the P method (FIG. 7A).

Next, a via hole 106 is formed by opening a part of the interlayer insulating film 104 on the first aluminum wiring 103 by using a photolithography method and an anisotropic dry etching method. CVD and CMP
The via hole 106 is formed by using the tungsten plug 1
07 (FIG. 7B). At this time, although depending on the manufacturing conditions of the tungsten plug 107, a small step of 50 nm or less usually occurs on the surface formed by the tungsten plug 107 and the interlayer insulating film 104.

Next, aluminum 1 is formed by sputtering.
After forming the film 08, a photoresist 109 is applied on the entire surface of the aluminum 108.

Next, a detection waveform 110 of the tungsten plug 107 is obtained by an image recognition method using an exposure device by utilizing a step of the aluminum 108 caused by a step between the tungsten plug 107 and the interlayer insulating film 104. The position of the plug 107 is detected (FIG. 8A). At this time, a grain boundary detection waveform of aluminum 108 which is noise of the detection waveform is as shown by 111.

Next, the detected tungsten plug 107
Quartz plate 112 and chrome pattern 11
The photomask 114 made of No. 3 is set in an exposure apparatus, and light 115 is irradiated toward the photoresist 109 through the photomask 114 to expose the photoresist 109 (FIG. 8B).

Next, the photoresist 109 is developed and patterned (FIG. 9A).

Finally, after patterning the aluminum 108 by dry etching using the patterned photoresist 109 as a mask, the photoresist 109 is removed to complete the second aluminum wiring 116 (FIG. 9B). ).

[0012]

In the above-described method of manufacturing a semiconductor device, even if the chromium pattern 113 is laid out in a shape completely including the tungsten plug 107 with a predetermined margin, the step shown in FIG. In this case, the detection waveform of the tungsten plug 107 is likely to have the same level of the grain boundary detection waveform of the aluminum 108 as that of the detection waveform, which is the noise of the detection waveform. The positional accuracy of the mask 114 with respect to the tungsten plug 107 is deteriorated. When this phenomenon occurs, the second
The aluminum wiring 116 is formed as shown in FIG. 9B, the contact area between the second aluminum wiring 116 and the tungsten plug 107 is reduced, and the contact resistance is increased.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method of manufacturing a semiconductor device comprising an integrated circuit having a multi-layered metal wiring, in which the positioning accuracy of a via plug buried in a via hole and a wiring in contact therewith is improved. An object of the present invention is to provide a method of manufacturing a semiconductor device in which the contact resistance with a via plug is stably reduced.

[0014]

According to the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming a first wiring on a base insulating film formed on a semiconductor substrate; and forming the first wiring on the base insulating film. Forming an interlayer insulating film thicker than the first wiring to cover the wiring; and polishing the interlayer insulating film on the first wiring from its surface to flatten the surface of the interlayer insulating film; Using the interlayer insulating film as a first planarizing film, and opening the first planarizing film on the first wiring to form the first planarizing film.
Forming an opening having a shape encompassed within the surface of the first wiring on the wiring, and embedding a first metal film in the opening, wherein the first metal film is The first flattening film is partially removed from the surface of the first flattening film so as to protrude from the surface of the first flattening film, and the height of the surface of the first flattening film is reduced to form the first flattening film. Forming a second flattening film; and depositing a second metal film on the second flattening film to form a second metal film covering the first metal film on the second metal film. Forming a step corresponding to the height of the protruding portion from the surface of the second planarization film, applying a resist film covering above the second metal film, and exposing the resist film to light. Detecting the reflected light due to the step under the resist film to detect the planar position of the step, based on the position Determining the position of a photomask above the resist film, exposing and developing the resist film through the photomask, forming a resist mask above the protrusion of the first metal film; Forming a second wiring made of a second metal film connected to the first metal film by etching the second metal film through etching of at least the material film immediately below the resist mask using the mask as a mask. A method of manufacturing a semiconductor device, comprising:
Characterized in that it is formed in a shape including the protruding portion of the metal film.

The method of manufacturing a semiconductor device has various modes of application.

First, the semiconductor substrate has an internal circuit region and an alignment region formed around the internal circuit region, and a protrusion of the first metal film is formed in the alignment region.

Next, in the step of forming the interlayer insulating film, the interlayer insulating film is formed by stacking a plurality of insulating films, and the first planarizing film is partially removed from its surface to form the first insulating film. In the step of reducing the height of the surface of the first flattening film to make the first flattening film a second flattening film,
Is formed by removing an uppermost insulating film among the plurality of insulating films constituting the first flattening film, or the interlayer insulating film is formed by a single-layer insulating film. It is formed by depositing.

Next, a second metal film is deposited on the second flattening film, and the second metal film covering the first metal film is covered with the second flattening film of the first metal film. A mask insulating film covering the second metal film is formed between the step of forming a step of the protruding portion from the oxide film surface and the step of applying a resist film covering the second metal film. A step of depositing is inserted, and the second wiring is formed by etching and removing the mask insulating film using the resist mask as a mask, and then etching and removing the second metal film using the mask insulating film as a mask. Is done.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a cross-sectional view of a semiconductor device in the course of a manufacturing method that best illustrates the features of the present embodiment, and FIGS. 2 and 3 are cross-sectional views illustrating the entire manufacturing method in the order of the manufacturing steps.

As shown in FIG. 1, in this embodiment, a tungsten plug 7 is buried in a via hole 6 provided in the interlayer insulating film 4, but at this time, a step formed by the tungsten plug 7 and the interlayer insulating film 4 causes A distinct step is caused in the aluminum 8 formed on the substrate.

The position detection waveform at the time of photomask alignment in the photo resist process for forming the second aluminum wiring 16 is as follows. Is directed toward the aluminum 8 and the reflected wave is detected.

Therefore, by making the structure of the tungsten plug 7 and the interlayer insulating film 4 as described above, the detection waveform for detecting the step of the aluminum 8 and the aluminum 8
The difference between the strength and the detected waveform for detecting the grain boundary can be increased, and the position of the tungsten plug 7 can be accurately recognized.

Next, a method of manufacturing the semiconductor device of FIG. 1 will be described with reference to FIGS.

First, a base insulating film 2 serving as a base for wiring is formed on a semiconductor substrate 1. Here, the base insulating film 2 is used for simplicity, but in the case of a multi-layer wiring, it means an interlayer insulating film that covers a wiring located below the wiring which the present invention focuses on. Subsequently, the first insulating film 2
Is formed (FIG. 2A).

Next, an interlayer insulating film 4 is deposited thicker than the first aluminum wiring 3 by using the CVD method, the surface thereof is flattened by using the CMP method, and an insulating film 5 is formed thereon. (FIG. 2 (b)).

Next, a via hole 6 is formed by opening a part of the interlayer insulating film 4 and the insulating film 5 on the first aluminum wiring 3 by using a photolithography method and an anisotropic dry etching method. (FIG. 2 (c)).

Next, using the CVD method and the CMP method,
The via hole 6 is buried with a tungsten plug 7 (FIG. 3).
(A)).

Next, the insulating film 5 is removed by dry etching so that the surface of the tungsten plug 7 protrudes from the surface of the interlayer insulating film 4, and the tungsten plug 7 and the interlayer insulating film 4 have a thickness of 100 to 200 nm. A step is formed (FIG. 3B). In the present embodiment, the structure in which the insulating film is deposited on the interlayer insulating film is used. However, the interlayer insulating film is simply deposited sufficiently thicker than the first aluminum wiring, and the CMP is performed.
A method may be adopted in which the surface is flattened using a method, a via hole and a tungsten plug are formed, and then the interlayer insulating film is etched away from the surface by a certain thickness.

Next, aluminum 8 is formed by sputtering.
Is formed to a thickness of 400 to 600 nm, and a photoresist 9 is applied on the entire surface of the aluminum 8. In the present embodiment, for simplicity, the metal film covering the tungsten plug 7 is simply aluminum 8 having a thickness of 400 to 600 nm. The structure has a film, and the thickness of the entire metal film is 500
７００700 nm.

Next, a detection waveform 10 of the via hole 6 is obtained by an image recognition method using an exposure apparatus by utilizing a step of the aluminum 8 caused by a step between the tungsten plug 7 and the interlayer insulating film 4. Is detected (FIG. 3 (c)). At this time, the grain boundary detection waveform of aluminum 8 which becomes the noise of the detection waveform is as shown in FIG.

Next, a photomask 14 comprising a quartz plate 12 and a chromium pattern 13 is set in an exposure apparatus in accordance with the detected position of the via hole 6, and
Then, light 15 is irradiated toward the photoresist 9 through the substrate to expose the photoresist 9 (FIG. 4A). At this time,
The chrome pattern 13 is laid out so as to completely cover the tungsten plug 7 with a predetermined margin. The chrome pattern 13 is aligned with the photomask 14 with high accuracy as described above. The transfer to the photoresist 9 can be performed while securing a margin as designed.

Next, the photoresist 9 is developed and patterned (FIG. 4B).

Finally, after patterning the aluminum 8 by dry etching using the patterned photoresist 9 as a mask, the photoresist 9 is removed to complete the second aluminum wiring 16 (FIG. 4).
(C)).

As described above, a clear step is formed in the aluminum 8 by the tungsten plug 7 buried in the via hole 6.
, And the difference between the detected waveforms of the aluminum 8 grains becomes large, and both can be clearly identified. Accordingly, the position of the tungsten plug 7 can be accurately recognized, and the position of the photomask 14 and the position of the tungsten plug 7 can be adjusted very accurately in the photolithography step of pattern nigging the aluminum 8. Wiring can be formed. When the aluminum 8 is patterned using the photoresist pattern obtained through this photolithography process as a mask, the second aluminum wiring 16 is formed in a shape including the tungsten plug 7 with a predetermined margin.
The connection resistance value between the tungsten plug 7 and the aluminum wiring 16 can be stably obtained at a low value, the production yield can be improved, and the production cost can be reduced.

FIGS. 5 to 7 are sectional views of the second embodiment of the present invention in the order of main steps. Since the first half of the manufacturing process of the present embodiment is the same as that of FIGS. 2A to 3B of the first embodiment, the illustration is omitted. This embodiment is a manufacturing method applied when the thickness of the second aluminum wiring is made larger than that of the first embodiment to lower the wiring resistance.

After FIG. 3B, aluminum 28 is formed to a thickness of 700 to 900 nm by sputtering, and a wiring protection insulating film 17 made of an oxide film is formed by CVD.
Is deposited to a thickness of 200 to 400 nm, and then a photoresist 9 is applied on the entire surface of the wiring protection insulating film 17 (FIG. 5A). 200-400 nm for the wiring protection insulating film 17
The thick deposition is performed as an etching mask when etching the thick aluminum 28 thereunder in a later step.

Next, utilizing the step of the aluminum 28 caused by the step of the tungsten plug 7 and the interlayer insulating film 4, the via hole 6 is formed by an image recognition method using an exposure apparatus.
By obtaining the detection waveform 30 shown in FIG. 5, the position of the via hole 6 is detected (FIG. 5B). At this time, the detection waveform of the grain boundary of the aluminum 28, which is noise of the detection waveform, is first
It is slightly larger than the embodiment of FIG.

Next, a photomask 14 composed of the quartz plate 12 and the chromium pattern 13 is set in an exposure apparatus in accordance with the detected position of the via hole 6.
Then, light 15 is irradiated toward the photoresist 9 through the substrate to expose the photoresist 9 (FIG. 6A). At this time,
Since the photomask 14 is positioned with high precision with respect to the tungsten plug 7, the chrome pattern 13 can be transferred to the photoresist 9 while securing a margin as designed.

Next, the photoresist 9 is developed and patterned.
Is used as a mask to etch the wiring protection insulating film 17 (FIG. 6B).

Finally, after the photoresist 9 is removed, the aluminum 28 is patterned by dry etching using the patterned wiring protection insulating film 17 as a mask to complete the second aluminum wiring 36 (FIG. 6).
(C)).

In this embodiment, the thickness of the aluminum layer 28 is larger than that of the first embodiment, and an insulating film which is not formed in the first embodiment covers the aluminum layer. Therefore, at the time of image recognition, the grain boundaries of aluminum are emphasized more than in the first embodiment due to the lens effect of the insulating film. Even in such a situation, the tungsten plug 7 buried in the via hole 6
As a result, a clear step is formed in the aluminum 28, so that the difference between the step of the aluminum 28 and the detected waveform of the grain of the aluminum 28 can be increased during image recognition, and the waveforms of both can be clearly identified. The same effect as that of the first embodiment can be obtained.

The above-mentioned protruding pattern of the tungsten plug from the surface of the interlayer insulating film may be formed as an alignment pattern in a photolithography process provided at least around a chip of a semiconductor device.

[0043]

As described above, according to the method of manufacturing a semiconductor device of the present invention, a tungsten plug formed to be buried in a via hole of an interlayer insulating film is projected from the surface of the interlayer insulating film so that the tungsten plug is formed. Since a distinct step is formed on the aluminum to be covered, the difference between the step of the aluminum and the detected waveform of the grain of the aluminum can be increased during image recognition, and the two waveforms can be clearly identified. Accordingly, the position of the tungsten plug can be accurately recognized, and the position of the photomask and the tungsten plug can be adjusted with high precision in the photolithography process of patterning aluminum, thereby forming a highly integrated aluminum wiring. can do. When aluminum is patterned using the photoresist pattern obtained through this photolithography process as a mask, the aluminum wiring is formed in a shape including the tungsten plug with a predetermined margin. It is possible to stably obtain a low connection resistance value, improve the production yield, and reduce the production cost.

[Brief description of the drawings]

FIG. 1 is a manufacturing process cross-sectional view illustrating a feature of a first embodiment of the present invention.

FIG. 2 is a cross-sectional view showing the first embodiment of the present invention in the order of manufacturing steps.

FIG. 3 is a cross-sectional view showing a manufacturing step following FIG. 2;

FIG. 4 is a cross-sectional view showing a manufacturing step following FIG. 3;

FIG. 5 is a sectional view showing a second embodiment of the present invention in the order of manufacturing steps.

FIG. 6 is a sectional view showing a manufacturing step following FIG. 5;

FIG. 7 is a cross-sectional view showing a manufacturing step following FIG. 6;

FIG. 8 is a sectional view showing a manufacturing process of a conventional example.

FIG. 9 is a cross-sectional view showing a manufacturing step following FIG. 8;

[Explanation of symbols]

 Reference Signs List 1, 101 semiconductor substrate 2, 102 base insulating film 3, 103 first aluminum wiring 4, 104 interlayer insulating film 5, 105 insulating film 6, 106 via hole 7, 107 tungsten plug 8, 28, 108 aluminum 9, 109 photoresist 10, 11, 30, 31, 110, 111 Detection waveform 12, 112 Quartz plate 13, 113 Chrome pattern 14, 114 Photomask 15, 115 Light 16, 36, 116 Second aluminum wiring 17 Wiring protection insulating film

Claims (6)

[Claims] A step of forming a first wiring on a base insulating film formed on a semiconductor substrate; and forming an interlayer insulating film on the base insulating film so as to cover the first wiring. Forming a thicker film, and polishing the interlayer insulating film on the first wiring from its surface to flatten the surface of the interlayer insulating film and use the interlayer insulating film as a first planarizing film. Forming a first flattening film on the first wiring to form an opening on the first wiring having a shape included in the surface of the first wiring; A step of embedding a first metal film in the opening;
The first planarization film is partially removed from the surface thereof so as to protrude from the surface of the first planarization film, and the height of the surface of the first planarization film is reduced, so that the first planarization film becomes Forming a second metal film on the second flattening film, and forming the first metal film on the second metal film covering the first metal film.
Forming a step corresponding to the height of a protruding portion of the metal film from the surface of the second planarization film, applying a resist film covering the second metal film, and applying the resist film Detecting the reflected light due to the step under the resist film by irradiating light, and detecting the planar position of the step, and determining the position of a photomask above the resist film based on the position. Exposing and developing the resist film through the photomask to form a resist mask above the protrusion of the first metal film; and etching the material film at least immediately below the resist mask using the resist mask as a mask. The second metal film is removed by etching through a second metal film connected to the first metal film.
Forming a second wiring made of a metal film of the above, wherein the resist mask comprises:
A method of manufacturing a semiconductor device, wherein the semiconductor device is formed in a shape including a projection of the first metal film. 2. The semiconductor device according to claim 1, wherein the semiconductor substrate has an internal circuit region and an alignment region formed around the internal circuit region, and a protrusion of the first metal film is formed in the alignment region. Manufacturing method. 3. In the step of forming the interlayer insulating film, the interlayer insulating film is formed by stacking a plurality of insulating films, and the first planarizing film is partially removed from a surface thereof to form the first insulating film. In the step of reducing the height of the surface of the flattening film to make the first flattening film a second flattening film, the second flattening film constitutes the first flattening film The method according to claim 1, wherein the semiconductor device is formed by removing an uppermost insulating film from the plurality of insulating films. 4. The method according to claim 1, wherein in the step of forming the interlayer insulating film, the interlayer insulating film is formed by depositing a single-layer insulating film. 5. The second planarization of the first metal film on a second metal film covering the first metal film by depositing a second metal film on the second planarization film. Depositing a mask insulating film covering the second metal film between a step of forming a step of a projecting portion from the film surface and a step of applying a resist film covering the second metal film; The method for manufacturing a semiconductor device according to claim 1, wherein a step of causing the semiconductor device to be inserted is inserted. 6. The second wiring is formed by etching and removing the mask insulating film using the resist mask as a mask, and then etching and removing the second metal film using the mask insulating film as a mask. Claim 5
The manufacturing method of the semiconductor device described in the above.