JPH0469432B2 - - Google Patents

Info

Publication number
JPH0469432B2
JPH0469432B2 JP16726084A JP16726084A JPH0469432B2 JP H0469432 B2 JPH0469432 B2 JP H0469432B2 JP 16726084 A JP16726084 A JP 16726084A JP 16726084 A JP16726084 A JP 16726084A JP H0469432 B2 JPH0469432 B2 JP H0469432B2
Authority
JP
Japan
Prior art keywords
integrated circuit
pad
chip
bonding
mounting pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP16726084A
Other languages
English (en)
Other versions
JPS6054461A (ja
Inventor
Kaaru Ruushu Reimondo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co filed Critical General Electric Co
Publication of JPS6054461A publication Critical patent/JPS6054461A/ja
Publication of JPH0469432B2 publication Critical patent/JPH0469432B2/ja
Granted legal-status Critical Current

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Classifications

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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49121—Beam lead frame or beam lead device

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】 〔発明の属する技術分野〕 この発明は上に集積回路を形成された半導体装
置に関し、特にその装置に含まれるチツプ支持パ
ツドの接地法に関する。
〔従来技術の説明〕
ある種の集積回路はその用途や固有の特徴構造
によつて近傍の他の装置に外部結合され易く、す
なわち装置の表面上の局在電荷により生ずる一般
的不安定を呈する。これらの問題を解決するため
に装置の外囲器の接地用指状導体と集積回路チツ
プを支持するパツトとを各別の導線で接続する
が、これには一般にチツプと支持パツドの縁との
間に十分な空き場があつてそこに導線を接合し得
るようにより大きな支持パツドを用いる必要があ
る。時には取付用パツドにチツプを接合するため
に使用される材料の一部があふれてこの領域の一
部に侵入することがあるが、あふれることを制御
するのは困難であるので、チツプと支持パツドの
縁との間隔をもつと大きくする必要がある。
接地線が支持パツドに接合されない場合、チツ
プと支持パツドの縁との標準的最小間隔は約
125μであるが、接地線を支持パツドに接合する
必要がある場合は約375μである。このような接
地線を必要とする場合は大抵支持パツドの寸法を
次の商用寸法まで増す必要があり、一般にパツド
面積の50％増以上となる。
必要なのは、チツプとパツドの縁との間隔を拡
げずに上記接地線を支持パツドへ取付ける方法で
ある。
〔発明の概要〕
この発明によつて、集積回路装置にチツプ支持
パツドを接地する技法が開示されるが、その装置
は集積回路チツプ内に形成された複数個の電気素
子と、チツプを支持する取付パツドと、取付パツ
ドとチツプの重量を支持するようにされた構造部
材と、チツプ近傍の接地用指状部と、チツプ上に
形成された少なくとも２個の接合パツドとを有
し、そのチツプ取付パツドを接地する方法は、(a)
各接合パツドを電気的に接続する金属化層をチツ
プ上に形成する段階と、(b)一端を接合パツドに、
他端を構造部材に接続した接続線を取付け、これ
によつてオーム接触を形成する段階と、(c)一端を
他の１つの接合パツドに、他端を接地用指状部に
接続した他の接続線を取付け、これによつてオー
ム接触を形成する段階とより成る。
〔推奨実施例の詳細な説明〕
第１図、第２図および第３図は１対の構造部材
１４により支持されたチツプ取付用パツド１２を
有する導体枠１０の一部を示す。各々接触端１８
を有する１組の導体１６がその接触端１８がパツ
ド１２から一定間隔をもつて隣接するように取付
パツド１２の外周に沿つて配置されている。導体
枠１０は銀メツキされ、導体１６および構造部材
１４の他端を支持する外側の構体（図示せず）を
有する。この導体枠の製造および使用については
当業者に公知であるからこゝではこれ以上説明し
ない。
中に集積回路が形成されたチツプ２０が当業者
に公知の方法で取付パツド１２の表面２２に接合
され、そのチツプ２０の表面にはその外縁に接近
し接触端１８に隣接して１組の小さな接合パツド
３０が形成されている。接合パツド３０は一般に
アルミニウムで、集積回路内の各点と電気的に接
続され、集積回路を他の回路や装置と相互接続す
る手段となつている。接合パツド３０と導体１６
は細い接続線３２で電気的に接続されている。線
３２は一般に金で、約27μの直径を有し、その一
端は当業者に公知の熱音波接合法を利用してパツ
ド３０に接合され、他端は同様に適当な導体１６
の接触端１８に接合されている。超音波接合や熱
圧着も当業者に公知で、使用することもできる
が、熱音波接合が推奨される。
チツプ２０に隣接して接触端３６を配列した接
地用指状部３４はその他端が導体１６と同様に導
体枠１０の外側の構体に支持されている。接合パ
ツド３０ａは、第１図に示すように、金属化導体
４０を介して集積回路の接地点と電気点に接続さ
れ、パツド３０ａと接地用指状部３４の接触端３
６が細い接続線３２ａにより上記の方法で電気的
に接続されている。
この発明の重要な特徴はチツプ取付パツド１２
を電気的に接地用指状部３４に取付ける方法であ
る。従来法の装置では、第１図に示すように、接
触端３６と取付パツド１２の接合点４２に細い接
続線３２ｂが接合されているが、これは接合点４
２に適正な接合を行うために十分な空間を確保す
るため必要とする以上に大きな取付パツド１２を
必要とする。しかし、この発明は、第２図および
第３図に示すように、細い接続線３２ｃの一端を
１つの構造部材１４の接合点に、他端を接合パツ
ド３０ｂに接合することにより同様の効果を果
す。接合パツド３０ｂはさらに第２図に示す接地
導体４０に接続されるか、第３図に示すように接
地用指状部３４近傍のチツプ２０上に形成された
他の接合パツド３０ｃに接続される。この接続は
金属化導体４６により成される。後者の場合、細
い接続線３２ｄの一端がパツド３０ｃに接合さ
れ、他端が接地用指状部３４の接触端３６に接合
される。
上記構体の使用により実現される重要な利点
は、チツプ取付パツド１２が実質的に小さく、金
の接続線３２が従来法の構体のそれよりも実質的
に短いことである。最も重要なことは、接続線３
２が短いほど樹脂埋込み工程で曲げを受けにくい
ため、接合部の強度が向上することである。ま
た、取付パツドの接地用接続部の強度も、接合点
４４の場所のため、チツプ２０と取付パツド１２
の接合に用いる材料の溢出による干渉の可能性が
なく、接地用接続線３２ｃが一端をチツプ２０上
のアルミニウム接合パツドに、他端を他の全ての
細い接続線３２の接合構体と同様の導体枠１０上
の銀接合点４４に接合されるため向上する。これ
により、従来法の構体におけるように、取付パツ
ド接地用接続線に対して他のすべての接続線３２
に対するのと異なる接合動作の必要性がなくな
る。
例えば、アール・シー・エー社の集積回路チツ
プCA3084型は普通約6.45mm2の表面積の取付パツ
ドを有する導体枠に取付けられているが、この構
成では取付パツドが一端を接地用指状部に接合さ
れ、他端をチツプの側面と取付パツドの縁との間
の領域で取付パツドに接合された接続線により接
地されている。一方、この発明の原理を使用する
ことにより、同じチツプを約4.13mm2の表面積の取
付パツドを有する導体枠に取付けることができ、
通常の構成の場合よりも取付パツド寸法で36％の
減少になる。同様に、通常構成の金接続線の平均
長さ約1.91mmに対し、この発明におけるそれは約
1.64mmで、接続線の長さが14％減になる。これに
より製造原価の低減が強調される。
【図面の簡単な説明】
第１図は従来法によるチツプ支持パツドの接地
接続を示す集積回路チツプを取付けた導体枠の一
部の平面図、第２図はこの発明による接地接続を
示す第１図と同様の平面図、第３図は第２図の接
地接続の１変形を示す第２図と同様の平面図であ
る。 １２……取付パツド、１４……構造部材、２０
……チツプ、３０ａ，３０ｂ……接合パツド、３
２ａ，３２ｂ……接続線、３４……接地用指状
部、４６……金属化導体。

Claims (1)

  1. 【特許請求の範囲】 １ (イ)複数個の電気部品と集積回路チツプ上に形
    成された２個の接合パツドとを有する該集積回路
    チツプ、(ロ)前記集積回路チツプを支持する取付パ
    ツド、(ハ)前記取付パツドに電気的に取付けられ、
    前記取付パツドと前記集積回路チツプの重量を支
    持するようにされた構造部材、および(ニ)前記取付
    パツドと前記構造部材との両方に電気的に独立で
    あつて、前記取付パツドと隣り合う接地用指状
    部、とを含む集積回路装置であつて、(a)前記の２
    個の接合パツドを電気的に接続する前記集積回路
    チツプ上の金属化層、(b)一端が前記２個の接合パ
    ツドの一方に電気的に接続され、他端が前記構造
    部材に電気的に接続された第１接続線、(c)一端が
    前記２個の接合パツドの他方に電気的に接続さ
    れ、他端が前記接地用指状部に電気的に接続され
    た第２接続線、とを有する集積回路装置。 ２ 前記集積回路チツプ上に形成され、前記２個
    の接合パツドと電気的に独立の第３の接合パツド
    と別個の接続線を有し、該別個の接続線の一端が
    前記第３の接合パツドに電気的に接続され、他端
    が前記接地用指状部に電気的に接続されている、
    特許請求の範囲１項に記載の集積回路装置。 ３ 前記集積回路チツプ上に形成され、前記２個
    の接合パツドの一方を前記電気部品の１個に接続
    する金属化層を含む特許請求の範囲１項に記載の
    集積回路装置。 ４ 前記接続線が熱圧着によつて接続される特許
    請求の範囲２項に記載の集積回路装置。 ５ 前記接続線が超音波接合によつて接続される
    特許請求の範囲２項に記載の集積回路装置。 ６ 前記接続線が熱音波接合によつて接続される
    特許請求の範囲２項に記載の集積回路装置。
JP59167260A 1983-08-10 1984-08-08 集積回路装置 Granted JPS6054461A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/521,897 US4534105A (en) 1983-08-10 1983-08-10 Method for grounding a pellet support pad in an integrated circuit device
US521897 1983-08-10

Publications (2)

Publication Number Publication Date
JPS6054461A JPS6054461A (ja) 1985-03-28
JPH0469432B2 true JPH0469432B2 (ja) 1992-11-06

Family

ID=24078595

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59167260A Granted JPS6054461A (ja) 1983-08-10 1984-08-08 集積回路装置

Country Status (10)

Country Link
US (1) US4534105A (ja)
JP (1) JPS6054461A (ja)
KR (1) KR930002386B1 (ja)
DE (1) DE3428881C2 (ja)
FR (1) FR2550661B1 (ja)
GB (1) GB2144910B (ja)
IN (1) IN160929B (ja)
IT (1) IT1174170B (ja)
SE (1) SE456874B (ja)
YU (1) YU119484A (ja)

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Also Published As

Publication number Publication date
US4534105A (en) 1985-08-13
KR850002173A (ko) 1985-05-06
SE456874B (sv) 1988-11-07
GB2144910A (en) 1985-03-13
JPS6054461A (ja) 1985-03-28
FR2550661B1 (fr) 1988-11-25
SE8403978L (sv) 1985-02-11
DE3428881C2 (de) 1996-05-09
GB2144910B (en) 1986-12-31
FR2550661A1 (fr) 1985-02-15
KR930002386B1 (en) 1993-03-29
YU119484A (en) 1987-08-31
SE8403978D0 (sv) 1984-08-03
DE3428881A1 (de) 1985-02-28
IN160929B (ja) 1987-08-15
IT1174170B (it) 1987-07-01
GB8419078D0 (en) 1984-08-30
IT8421350A0 (it) 1984-06-11

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