JPH04288607A - クロック信号切り換え回路 - Google Patents

クロック信号切り換え回路

Info

Publication number
JPH04288607A
JPH04288607A JP3052644A JP5264491A JPH04288607A JP H04288607 A JPH04288607 A JP H04288607A JP 3052644 A JP3052644 A JP 3052644A JP 5264491 A JP5264491 A JP 5264491A JP H04288607 A JPH04288607 A JP H04288607A
Authority
JP
Japan
Prior art keywords
clock signal
circuit
switching
input
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3052644A
Other languages
English (en)
Japanese (ja)
Inventor
Yoshinori Hashimoto
芳徳 橋本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP3052644A priority Critical patent/JPH04288607A/ja
Priority to TW081100304A priority patent/TW197501B/zh
Publication of JPH04288607A publication Critical patent/JPH04288607A/ja
Priority to US08/235,134 priority patent/US5448597A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/00006—Changing the frequency
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Electronic Switches (AREA)
JP3052644A 1991-03-18 1991-03-18 クロック信号切り換え回路 Pending JPH04288607A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP3052644A JPH04288607A (ja) 1991-03-18 1991-03-18 クロック信号切り換え回路
TW081100304A TW197501B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1991-03-18 1992-01-17
US08/235,134 US5448597A (en) 1991-03-18 1994-04-28 Clock signal switching circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3052644A JPH04288607A (ja) 1991-03-18 1991-03-18 クロック信号切り換え回路

Publications (1)

Publication Number Publication Date
JPH04288607A true JPH04288607A (ja) 1992-10-13

Family

ID=12920551

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3052644A Pending JPH04288607A (ja) 1991-03-18 1991-03-18 クロック信号切り換え回路

Country Status (3)

Country Link
US (1) US5448597A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPH04288607A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
TW (1) TW197501B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160079449A (ko) 2014-12-26 2016-07-06 에스케이씨 주식회사 적층 폴리에스테르 필름 및 이의 제조방법

Families Citing this family (16)

* Cited by examiner, † Cited by third party
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DE69228980T2 (de) * 1991-12-06 1999-12-02 National Semiconductor Corp., Santa Clara Integriertes Datenverarbeitungssystem mit CPU-Kern und unabhängigem parallelen, digitalen Signalprozessormodul
US5614850A (en) * 1994-12-09 1997-03-25 Texas Instruments Incorporated Current sensing circuit and method
US6172937B1 (en) * 1998-05-13 2001-01-09 Intel Corporation Multiple synthesizer based timing signal generation scheme
US6453425B1 (en) * 1999-11-23 2002-09-17 Lsi Logic Corporation Method and apparatus for switching clocks presented to synchronous SRAMs
US6239626B1 (en) 2000-01-07 2001-05-29 Cisco Technology, Inc. Glitch-free clock selector
CN1282060C (zh) * 2001-02-07 2006-10-25 高通股份有限公司 将时钟信号用于移动用户台的处理器以管理功耗的方法和设备
US6452426B1 (en) * 2001-04-16 2002-09-17 Nagesh Tamarapalli Circuit for switching between multiple clocks
US6982573B2 (en) * 2001-05-30 2006-01-03 Stmicroelectronics Limited Switchable clock source
EP1263139A3 (en) * 2001-05-30 2006-07-05 STMicroelectronics Limited Glitch-free multiplexer
US6774681B2 (en) * 2001-05-30 2004-08-10 Stmicroelectronics Limited Switchable clock source
US6839391B2 (en) * 2002-01-08 2005-01-04 Motorola, Inc. Method and apparatus for a redundant clock
JP3593104B2 (ja) * 2002-01-11 2004-11-24 沖電気工業株式会社 クロック切替回路
US7679408B2 (en) * 2007-12-20 2010-03-16 International Business Machines Corporation Glitchless clock multiplexer optimized for synchronous and asynchronous clocks
US8086989B2 (en) * 2007-12-20 2011-12-27 International Business Machines Corporation Structure for glitchless clock multiplexer optimized for synchronous and asynchronous clocks
EP2139113A1 (en) * 2008-06-23 2009-12-30 Dialog Semiconductor GmbH Glitch-free clock suspend and resume circuit
TWI865274B (zh) * 2023-12-28 2024-12-01 瑞昱半導體股份有限公司 取樣裝置及其時脈調整電路

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61136116A (ja) * 1984-12-06 1986-06-24 Fujitsu Ten Ltd 動作周波数切換形マイクロコンピユ−タ
JPS63169142A (ja) * 1987-01-05 1988-07-13 Nec Corp 切替回路
JPH03282805A (ja) * 1990-03-30 1991-12-13 Nec Corp クロック信号切換回路

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB8615399D0 (en) * 1986-06-24 1986-07-30 Int Computers Ltd Switching circuit
JPS63232615A (ja) * 1987-03-20 1988-09-28 Fujitsu Ltd クロツク切替回路
JPH01116815A (ja) * 1987-10-30 1989-05-09 Fujitsu Ltd クロック切換え回路
US4855616A (en) * 1987-12-22 1989-08-08 Amdahl Corporation Apparatus for synchronously switching frequency source
US4965524A (en) * 1988-06-09 1990-10-23 National Semiconductor Corp. Glitch free clock select
US4899351A (en) * 1988-07-18 1990-02-06 Western Digital Corporation Transient free clock switch logic
JP2739964B2 (ja) * 1988-09-28 1998-04-15 株式会社東芝 クロック切替回路
US5086236A (en) * 1990-08-27 1992-02-04 Advanced Micro Devices, Inc. Synchronizing circuit of two clock signals
US5099140A (en) * 1990-08-31 1992-03-24 Advanced Micro Devices, Inc. Synchronous clock source selector
US5155380A (en) * 1991-04-12 1992-10-13 Acer Incorporated Clock switching circuit and method for preventing glitch during switching

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61136116A (ja) * 1984-12-06 1986-06-24 Fujitsu Ten Ltd 動作周波数切換形マイクロコンピユ−タ
JPS63169142A (ja) * 1987-01-05 1988-07-13 Nec Corp 切替回路
JPH03282805A (ja) * 1990-03-30 1991-12-13 Nec Corp クロック信号切換回路

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160079449A (ko) 2014-12-26 2016-07-06 에스케이씨 주식회사 적층 폴리에스테르 필름 및 이의 제조방법

Also Published As

Publication number Publication date
TW197501B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-01-01
US5448597A (en) 1995-09-05

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