JPH03787B2 - - Google Patents
Info
- Publication number
- JPH03787B2 JPH03787B2 JP57145471A JP14547182A JPH03787B2 JP H03787 B2 JPH03787 B2 JP H03787B2 JP 57145471 A JP57145471 A JP 57145471A JP 14547182 A JP14547182 A JP 14547182A JP H03787 B2 JPH03787 B2 JP H03787B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- oxide film
- silicon
- silicon oxide
- silicon nitride
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Local Oxidation Of Silicon (AREA)
- Bipolar Transistors (AREA)
- Drying Of Semiconductors (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57145471A JPS5935445A (ja) | 1982-08-24 | 1982-08-24 | 半導体装置の製造方法 |
| US06/525,570 US4660068A (en) | 1982-08-24 | 1983-08-22 | Substrate structure of semiconductor device and method of manufacturing the same |
| DE8383304898T DE3380104D1 (en) | 1982-08-24 | 1983-08-24 | Substrate structure of semiconductor device and method of manufacturing the same |
| EP83304898A EP0104765B1 (en) | 1982-08-24 | 1983-08-24 | Substrate structure of semiconductor device and method of manufacturing the same |
| KR1019830003959A KR880000975B1 (ko) | 1982-08-24 | 1983-08-24 | 반도체 장치의 기판구조 및 그 제조방법 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57145471A JPS5935445A (ja) | 1982-08-24 | 1982-08-24 | 半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5935445A JPS5935445A (ja) | 1984-02-27 |
| JPH03787B2 true JPH03787B2 (cg-RX-API-DMAC7.html) | 1991-01-08 |
Family
ID=15386007
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57145471A Granted JPS5935445A (ja) | 1982-08-24 | 1982-08-24 | 半導体装置の製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US4660068A (cg-RX-API-DMAC7.html) |
| JP (1) | JPS5935445A (cg-RX-API-DMAC7.html) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0680726B2 (ja) * | 1985-04-18 | 1994-10-12 | ソニー株式会社 | 半導体装置の製造方法 |
| US4910575A (en) * | 1986-06-16 | 1990-03-20 | Matsushita Electric Industrial Co., Ltd. | Semiconductor integrated circuit and its manufacturing method |
| US4980311A (en) * | 1987-05-05 | 1990-12-25 | Seiko Epson Corporation | Method of fabricating a semiconductor device |
| JPH01125858A (ja) * | 1987-11-10 | 1989-05-18 | Fujitsu Ltd | 半導体装置およびその製造方法 |
| US4825277A (en) * | 1987-11-17 | 1989-04-25 | Motorola Inc. | Trench isolation process and structure |
| US4893163A (en) * | 1988-03-28 | 1990-01-09 | International Business Machines Corporation | Alignment mark system for electron beam/optical mixed lithography |
| US5406113A (en) * | 1991-01-09 | 1995-04-11 | Fujitsu Limited | Bipolar transistor having a buried collector layer |
| KR0156115B1 (ko) * | 1994-06-16 | 1998-12-01 | 문정환 | 반도체 소자의 격리막 구조 및 형성방법 |
| JP3360970B2 (ja) * | 1995-05-22 | 2003-01-07 | 株式会社東芝 | 半導体装置の製造方法 |
| US6090685A (en) * | 1997-08-22 | 2000-07-18 | Micron Technology Inc. | Method of forming a LOCOS trench isolation structure |
| US6127215A (en) | 1998-10-29 | 2000-10-03 | International Business Machines Corp. | Deep pivot mask for enhanced buried-channel PFET performance and reliability |
| US9685524B2 (en) * | 2005-03-11 | 2017-06-20 | Vishay-Siliconix | Narrow semiconductor trench structure |
| KR100636680B1 (ko) * | 2005-06-29 | 2006-10-23 | 주식회사 하이닉스반도체 | 리세스 게이트 및 비대칭 불순물영역을 갖는 반도체소자 및그 제조방법 |
| TWI489557B (zh) | 2005-12-22 | 2015-06-21 | Vishay Siliconix | 高移動率p-通道溝槽及平面型空乏模式的功率型金屬氧化物半導體場效電晶體 |
| US8409954B2 (en) | 2006-03-21 | 2013-04-02 | Vishay-Silconix | Ultra-low drain-source resistance power MOSFET |
| US9412883B2 (en) | 2011-11-22 | 2016-08-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods and apparatus for MOS capacitors in replacement gate process |
| CN103579074B (zh) * | 2012-07-20 | 2016-07-06 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构的形成方法 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5345675B2 (cg-RX-API-DMAC7.html) * | 1971-10-12 | 1978-12-08 | ||
| JPS5350636A (en) * | 1976-10-20 | 1978-05-09 | Hitachi Ltd | Service processor |
| JPS55157044A (en) * | 1979-05-28 | 1980-12-06 | Toshiba Corp | Information processor |
| US4274909A (en) * | 1980-03-17 | 1981-06-23 | International Business Machines Corporation | Method for forming ultra fine deep dielectric isolation |
| EP0048175B1 (en) * | 1980-09-17 | 1986-04-23 | Hitachi, Ltd. | Semiconductor device and method of manufacturing the same |
| US4331708A (en) * | 1980-11-04 | 1982-05-25 | Texas Instruments Incorporated | Method of fabricating narrow deep grooves in silicon |
| US4502913A (en) * | 1982-06-30 | 1985-03-05 | International Business Machines Corporation | Total dielectric isolation for integrated circuits |
| JPS5961045A (ja) * | 1982-09-29 | 1984-04-07 | Fujitsu Ltd | 半導体装置の製造方法 |
-
1982
- 1982-08-24 JP JP57145471A patent/JPS5935445A/ja active Granted
-
1983
- 1983-08-22 US US06/525,570 patent/US4660068A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US4660068A (en) | 1987-04-21 |
| JPS5935445A (ja) | 1984-02-27 |
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