JPH0374508B2 - - Google Patents
Info
- Publication number
- JPH0374508B2 JPH0374508B2 JP61062981A JP6298186A JPH0374508B2 JP H0374508 B2 JPH0374508 B2 JP H0374508B2 JP 61062981 A JP61062981 A JP 61062981A JP 6298186 A JP6298186 A JP 6298186A JP H0374508 B2 JPH0374508 B2 JP H0374508B2
- Authority
- JP
- Japan
- Prior art keywords
- forming
- contact pad
- post
- substrate
- dimensional
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, the devices being individual devices of subclass H10D or integrated devices of class H10
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
- H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06524—Electrical connections formed on device or on substrate, e.g. a deposited or grown layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
- H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
- H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06596—Structural arrangements for testing
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61062981A JPS62219954A (ja) | 1986-03-20 | 1986-03-20 | 三次元icの製造方法 |
KR1019870002514A KR900008647B1 (ko) | 1986-03-20 | 1987-03-19 | 3차원 집적회로와 그의 제조방법 |
EP87104091A EP0238089B1 (en) | 1986-03-20 | 1987-03-20 | Three-dimensional integrated circuit and manufacturing method therefor |
DE8787104091T DE3778944D1 (de) | 1986-03-20 | 1987-03-20 | Dreidimensionale integrierte schaltung und deren herstellungsverfahren. |
US07/325,122 US4939568A (en) | 1986-03-20 | 1989-03-17 | Three-dimensional integrated circuit and manufacturing method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61062981A JPS62219954A (ja) | 1986-03-20 | 1986-03-20 | 三次元icの製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62219954A JPS62219954A (ja) | 1987-09-28 |
JPH0374508B2 true JPH0374508B2 (enrdf_load_stackoverflow) | 1991-11-27 |
Family
ID=13216045
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61062981A Granted JPS62219954A (ja) | 1986-03-20 | 1986-03-20 | 三次元icの製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62219954A (enrdf_load_stackoverflow) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0817177B2 (ja) * | 1987-11-16 | 1996-02-21 | 日産自動車株式会社 | 半導体装置 |
JPH01189141A (ja) * | 1988-01-25 | 1989-07-28 | Nec Corp | 半導体装置 |
EP2270846A3 (en) | 1996-10-29 | 2011-12-21 | ALLVIA, Inc. | Integrated circuits and methods for their fabrication |
US6882030B2 (en) | 1996-10-29 | 2005-04-19 | Tru-Si Technologies, Inc. | Integrated circuit structures with a conductor formed in a through hole in a semiconductor substrate and protruding from a surface of the substrate |
JP4126747B2 (ja) * | 1998-02-27 | 2008-07-30 | セイコーエプソン株式会社 | 3次元デバイスの製造方法 |
JP4085459B2 (ja) * | 1998-03-02 | 2008-05-14 | セイコーエプソン株式会社 | 3次元デバイスの製造方法 |
JP2005504445A (ja) * | 2001-10-01 | 2005-02-10 | エグシル テクノロジー リミテッド | 基板、特に半導体ウェハの加工 |
JP4190211B2 (ja) * | 2002-06-05 | 2008-12-03 | 株式会社東京精密 | 基板加工方法および基板加工装置 |
JP3690407B2 (ja) | 2003-07-31 | 2005-08-31 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
JP5072210B2 (ja) * | 2004-10-05 | 2012-11-14 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
US20080200011A1 (en) * | 2006-10-06 | 2008-08-21 | Pillalamarri Sunil K | High-temperature, spin-on, bonding compositions for temporary wafer bonding using sliding approach |
SG156550A1 (en) * | 2008-05-06 | 2009-11-26 | Gautham Viswanadam | Wafer level integration module with interconnects |
FR3082663B1 (fr) * | 2018-06-14 | 2022-01-07 | Aledia | Dispositif optoelectronique |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS607149A (ja) * | 1983-06-24 | 1985-01-14 | Nec Corp | 半導体装置の製造方法 |
JPS6098654A (ja) * | 1983-11-02 | 1985-06-01 | Nec Corp | 半導体装置の製造方法 |
JPS60235446A (ja) * | 1984-05-09 | 1985-11-22 | Nec Corp | 半導体装置とその製造方法 |
-
1986
- 1986-03-20 JP JP61062981A patent/JPS62219954A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS62219954A (ja) | 1987-09-28 |
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