JPH0317668U - - Google Patents
Info
- Publication number
- JPH0317668U JPH0317668U JP7748789U JP7748789U JPH0317668U JP H0317668 U JPH0317668 U JP H0317668U JP 7748789 U JP7748789 U JP 7748789U JP 7748789 U JP7748789 U JP 7748789U JP H0317668 U JPH0317668 U JP H0317668U
- Authority
- JP
- Japan
- Prior art keywords
- hole
- electrode land
- insulating glass
- land
- glass layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000011521 glass Substances 0.000 claims description 8
- 239000000758 substrate Substances 0.000 claims description 2
- 239000004020 conductor Substances 0.000 claims 3
- 239000006071 cream Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
第１図ないし第３図は本考案の混成集積回路構
造を説明するもので、それぞれ図ａは回路基板の
上面図、図ｂはその断面図である。第４図は従来
の混成集積回路構造を示し、図ａは上面図、図ｂ
はその断面図である。
符号の説明、１…絶縁性基板、２…スルーホー
ル、３…スルーホール電極ランド、４，４′…部
品電極ランド、５，５′…ガラス絶縁層、６…ク
リーム半田、７…チツプ部品。
1 to 3 illustrate the hybrid integrated circuit structure of the present invention, in which Figure a is a top view of the circuit board and Figure b is a cross-sectional view thereof. Figure 4 shows a conventional hybrid integrated circuit structure, where Figure a is a top view and Figure b
is a sectional view thereof. Explanation of the symbols: 1... Insulating substrate, 2... Through hole, 3... Through hole electrode land, 4, 4'... Component electrode land, 5, 5'... Glass insulating layer, 6... Cream solder, 7... Chip component.
Claims (1)
スルーホール、該スルーホールを中央部に持つ露
出した導体からなるスルーホール電極ランド、及
びこれに隣接する部品電極ランドを有してなる混
成集積回路用回路基板であつて、スルーホール導
体が形成された穴部内壁はこれに内接する絶縁性
ガラスの中空円柱が形成されるように絶縁性ガラ
ス層で被覆されており、該ガラス中空円柱はその
両末部がラツパ状に開いていて基板の両表面にス
ルーホールの開口部を内周円とし、それより大き
い同心円を外周円とする薄い絶縁性ガラス層の環
状体を形成しており、該環状体は前記スルーホー
ル電極ランドの中央部を横切つてスルーホール電
極ランド上に塗布された帯状の絶縁性ガラス層に
よつてスルーホール電極ランド周囲の絶縁層と連
接されており、前記スルーホール電極ランドのガ
ラス被覆されていない部分の少なくとも一部が前
記隣接部品電極ランドと共同してチツプ部品を搭
載するための部品電極ランドとして使用できる構
造となつていることを特徴とする回路基板。 For a hybrid integrated circuit comprising at least one through hole with a conductor layer formed on the inner wall surface, a through hole electrode land made of an exposed conductor having the through hole in the center, and a component electrode land adjacent to the through hole electrode land. In the circuit board, the inner wall of the hole in which the through-hole conductor is formed is covered with an insulating glass layer so as to form a hollow cylinder of insulating glass inscribed therein, and the hollow glass cylinder has both sides. The ends of the thin insulating glass layer are opened in a round shape, and a thin insulating glass layer is formed on both surfaces of the substrate, with the opening of the through hole as the inner circle and a larger concentric circle as the outer circle. The body is connected to the insulating layer around the through-hole electrode land by a band-shaped insulating glass layer applied on the through-hole electrode land across the center of the through-hole electrode land, and the through-hole electrode 1. A circuit board characterized in that at least a part of a land that is not covered with glass can be used as a component electrode land for mounting a chip component together with the adjacent component electrode land.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989077487U JPH0745980Y2 (en) | 1989-06-30 | 1989-06-30 | Circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989077487U JPH0745980Y2 (en) | 1989-06-30 | 1989-06-30 | Circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0317668U true JPH0317668U (en) | 1991-02-21 |
| JPH0745980Y2 JPH0745980Y2 (en) | 1995-10-18 |
Family
ID=31619920
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989077487U Expired - Lifetime JPH0745980Y2 (en) | 1989-06-30 | 1989-06-30 | Circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0745980Y2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50127706U (en) * | 1974-04-02 | 1975-10-20 | ||
| JP2009044112A (en) * | 2007-07-13 | 2009-02-26 | Sharp Corp | Device loading board, electronic component, light emitting device, liquid crystal backlight device and mounting method of electronic component |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54101469U (en) * | 1977-12-28 | 1979-07-17 |
-
1989
- 1989-06-30 JP JP1989077487U patent/JPH0745980Y2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54101469U (en) * | 1977-12-28 | 1979-07-17 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50127706U (en) * | 1974-04-02 | 1975-10-20 | ||
| JP2009044112A (en) * | 2007-07-13 | 2009-02-26 | Sharp Corp | Device loading board, electronic component, light emitting device, liquid crystal backlight device and mounting method of electronic component |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0745980Y2 (en) | 1995-10-18 |