JPH0311689B2 - - Google Patents
Info
- Publication number
- JPH0311689B2 JPH0311689B2 JP59011164A JP1116484A JPH0311689B2 JP H0311689 B2 JPH0311689 B2 JP H0311689B2 JP 59011164 A JP59011164 A JP 59011164A JP 1116484 A JP1116484 A JP 1116484A JP H0311689 B2 JPH0311689 B2 JP H0311689B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- flip
- circuit
- flop
- level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Electronic Switches (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Microcomputers (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59011164A JPS60154709A (ja) | 1984-01-25 | 1984-01-25 | クロツク信号発生回路 |
DE8484114288T DE3485460D1 (de) | 1984-01-25 | 1984-11-26 | Taktimpulsgenerator. |
EP84114288A EP0150316B1 (en) | 1984-01-25 | 1984-11-26 | Clock generator |
US06/676,318 US4641044A (en) | 1984-01-25 | 1984-11-29 | Clock generator with reset and initialization circuitry |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59011164A JPS60154709A (ja) | 1984-01-25 | 1984-01-25 | クロツク信号発生回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60154709A JPS60154709A (ja) | 1985-08-14 |
JPH0311689B2 true JPH0311689B2 (en, 2012) | 1991-02-18 |
Family
ID=11770398
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59011164A Granted JPS60154709A (ja) | 1984-01-25 | 1984-01-25 | クロツク信号発生回路 |
Country Status (4)
Country | Link |
---|---|
US (1) | US4641044A (en, 2012) |
EP (1) | EP0150316B1 (en, 2012) |
JP (1) | JPS60154709A (en, 2012) |
DE (1) | DE3485460D1 (en, 2012) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4700084A (en) * | 1985-08-26 | 1987-10-13 | Rockwell International Corporation | Digital clock recovery circuit apparatus |
US4851987A (en) * | 1986-01-17 | 1989-07-25 | International Business Machines Corporation | System for reducing processor power consumption by stopping processor clock supply if a desired event does not occur |
US4728816A (en) * | 1986-05-16 | 1988-03-01 | Tektronix, Inc. | Error and calibration pulse generator |
IT1189150B (it) * | 1986-06-10 | 1988-01-28 | Honeywell Inf Systems | Unita' di temporizzazione in tecnologia ttl |
US4736119A (en) * | 1987-02-04 | 1988-04-05 | American Telephone And Telegraph Company, At&T Bell Laboratories | Dynamic CMOS current surge control |
JPH0812756B2 (ja) * | 1987-06-22 | 1996-02-07 | 松下電子工業株式会社 | スタチックram回路 |
JP2845438B2 (ja) * | 1987-10-19 | 1999-01-13 | 株式会社東芝 | 高速ディジタルic |
US5117314A (en) * | 1989-06-27 | 1992-05-26 | Western Digital Corporation | Disk drive pulse detection method and circuit |
JPH0446722U (en, 2012) * | 1990-08-28 | 1992-04-21 | ||
WO1992007316A1 (en) * | 1990-10-12 | 1992-04-30 | Intel Corporation | Dynamically switchable multi-frequency clock generator |
JPH05333955A (ja) * | 1992-05-28 | 1993-12-17 | Nec Corp | 半導体集積回路 |
DE4321315C1 (de) * | 1993-06-26 | 1995-01-05 | Itt Ind Gmbh Deutsche | Takterzeugungsschaltung für taktgesteuerte Logikschaltungen |
US5719517A (en) * | 1993-06-29 | 1998-02-17 | Mitsubishi Denki Kabushiki Kaisha | Clock generating circuit for digital circuit operating in synchronism with clock, semiconductor integrated circuit including them, and logical gate used for them |
US5446403A (en) * | 1994-02-04 | 1995-08-29 | Zenith Data Systems Corporation | Power on reset signal circuit with clock inhibit and delayed reset |
JPH08123520A (ja) * | 1994-10-25 | 1996-05-17 | Mitsubishi Electric Corp | 駆動制御指令装置と複数台の駆動制御指令装置の同期制御システム及びその同期制御方法 |
US5568100A (en) * | 1995-09-22 | 1996-10-22 | Lucent Technologies Inc. | Synchronous power down clock oscillator device |
US20070013425A1 (en) * | 2005-06-30 | 2007-01-18 | Burr James B | Lower minimum retention voltage storage elements |
US7592836B1 (en) * | 2006-03-31 | 2009-09-22 | Masleid Robert P | Multi-write memory circuit with multiple data inputs |
US8067970B2 (en) * | 2006-03-31 | 2011-11-29 | Masleid Robert P | Multi-write memory circuit with a data input and a clock input |
TWI311409B (en) * | 2006-06-16 | 2009-06-21 | Realtek Semiconductor Corp | Reset method of digital circuit and related signal generating apparatus |
US9223365B2 (en) | 2013-03-16 | 2015-12-29 | Intel Corporation | Method and apparatus for controlled reset sequences without parallel fuses and PLL'S |
US11750183B1 (en) | 2022-07-31 | 2023-09-05 | Winbond Electronics Corp. | Clock signal generator and clock signal generating method thereof |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3866022A (en) * | 1972-12-26 | 1975-02-11 | Nasa | System for generating timing and control signals |
GB1466603A (en) * | 1974-11-06 | 1977-03-09 | Burroughs Corp | Flip-flop controlled clock gating system |
US4171517A (en) * | 1977-01-25 | 1979-10-16 | Tokyo Shibaura Electric Company, Limited | Apparatus for synchronization control of a plurality of inverters |
JPS588778B2 (ja) * | 1977-05-31 | 1983-02-17 | 工業技術院長 | 電気パルス抽出回路 |
US4241418A (en) * | 1977-11-23 | 1980-12-23 | Honeywell Information Systems Inc. | Clock system having a dynamically selectable clock period |
FR2448257A1 (fr) * | 1979-02-05 | 1980-08-29 | Trt Telecom Radio Electr | Dispositif de resynchronisation rapide d'une horloge |
US4316247A (en) * | 1979-10-30 | 1982-02-16 | Texas Instruments, Inc. | Low power consumption data processing system |
US4419629A (en) * | 1980-06-25 | 1983-12-06 | Sperry Corporation | Automatic synchronous switch for a plurality of asynchronous oscillators |
GB2080585B (en) * | 1980-07-22 | 1984-07-04 | Tokyo Shibaura Electric Co | Semiconductor integrated circuit with reduced power consumption |
JPS57101434A (en) * | 1980-12-16 | 1982-06-24 | Toshiba Corp | Oscillator |
DE3105905C2 (de) * | 1981-02-18 | 1982-11-04 | Eurosil GmbH, 8000 München | Schaltungsanordnung zum Umwandeln von Eingangsimpulsen in prellfreie und mit einem vorgegebenen Takt synchrone Ausgangsimpulse |
US4398155A (en) * | 1981-06-15 | 1983-08-09 | Motorola, Inc. | Multiple clock switching circuit |
US4560939A (en) * | 1984-04-02 | 1985-12-24 | Sperry Corporation | Synchronized selectable rate clocking system |
-
1984
- 1984-01-25 JP JP59011164A patent/JPS60154709A/ja active Granted
- 1984-11-26 DE DE8484114288T patent/DE3485460D1/de not_active Expired - Lifetime
- 1984-11-26 EP EP84114288A patent/EP0150316B1/en not_active Expired
- 1984-11-29 US US06/676,318 patent/US4641044A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0150316A2 (en) | 1985-08-07 |
US4641044A (en) | 1987-02-03 |
EP0150316B1 (en) | 1992-01-15 |
JPS60154709A (ja) | 1985-08-14 |
EP0150316A3 (en) | 1988-05-04 |
DE3485460D1 (de) | 1992-02-27 |
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