JPH0264233U - - Google Patents
Info
- Publication number
- JPH0264233U JPH0264233U JP1989122680U JP12268089U JPH0264233U JP H0264233 U JPH0264233 U JP H0264233U JP 1989122680 U JP1989122680 U JP 1989122680U JP 12268089 U JP12268089 U JP 12268089U JP H0264233 U JPH0264233 U JP H0264233U
- Authority
- JP
- Japan
- Prior art keywords
- current
- voltage comparator
- difference
- transistor
- currents
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000008878 coupling Effects 0.000 claims 4
- 238000010168 coupling process Methods 0.000 claims 4
- 238000005859 coupling reaction Methods 0.000 claims 4
- 238000010586 diagram Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
- G11C11/416—Read-write [R-W] circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
- H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
- H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
- H03K5/2409—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using bipolar transistors
- H03K5/2418—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using bipolar transistors with at least one differential stage
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
- H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
- H03K5/2409—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using bipolar transistors
- H03K5/2427—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using bipolar transistors using clock signals
Description
第1図は本考案の比較器の回路図、第2図は第
1図の比較器のラツチ部分の他の実施例である。 100……ギルバートゲインセル、101……
入力作動増幅器、102,102′……出力ラツ
チ装置、103……スイツチング装置。
1図の比較器のラツチ部分の他の実施例である。 100……ギルバートゲインセル、101……
入力作動増幅器、102,102′……出力ラツ
チ装置、103……スイツチング装置。
Claims (1)
- 【実用新案登録請求の範囲】 1 第1および2の状態を有する電圧比較器にお
いて、 制御信号に応答して前記電圧比較器の状態を、
選択する手段と、 前記電圧比較器の第1の状態が選択されたとき
に、印加される入力電圧の差に応じて第1および
第2の電流を供給する第1の手段と、 前記電圧比較器の第1の状態が選択されたとき
に、前記第1の電流と第2の電流の差を増幅する
差電流増幅器と、 前記差電流増幅器に応答して前記第1の電流と
第2の電流の前記増幅された差の関数として差電
圧を発生する第2の手段と、 前記第2の手段に結合され、前記第2の状態が
選択されたときに前記差電圧を増加させてラツチ
するラツチ手段とを備えていることを特徴とする
電圧比較器。 2 実用新案登録請求の範囲第1項記載の電圧比
較器において、 前記差電流増幅器に第3の電流を結合させる第
3の手段を更に含み、 前記差電流増幅器は前記第1の手段から前記第
2の手段へ前記第1および第2の電流をそれぞれ
結合させる第4および第5の手段と、前記第1の
電流と第2の電流差に応答して前記第3の電流を
第1および第2の電流部分に分割する第6の手段
と、前記第1の電流部分を前記第1の電流にそし
て前記第2の電流部分を前記第2の電流に加算し
、前記第2の手段に結合される電流の差が前記第
1の電流と第2の電流の差より大きくなるように
する手段と、を備えていることを特徴とする電圧
比較器。 3 実用新案登録請求の範囲第2項記載の電圧比
較器において、前記比較器が前記第1の状態にあ
るとき、前記第3の電流と、前記第1および第2
の電流の和とがそれぞれほぼ一定となるようにす
る電流調整手段を更に備えていることを特徴とす
る電圧比較器。 4 実用新案登録請求の範囲第2項または第3項
記載の電圧比較器において、前記第4および第5
の手段はそれぞれ、前記第1の手段に接続される
エミツタと前記第2の手段に接続されるコレクタ
とを有する第1および第2のトランジスタを備え
ており、前記第6の手段はそれぞれ前記第3の手
段に接続されるエミツタを有する第3および第4
のトランジスタを備えており、前記第3および第
4のトランジスタのベースがそれぞれ前記第1お
よび第2のトランジスタのエミツタに接続されて
おり、前記第3および第4のトランジスタのコレ
クタがそれぞれ前記第2および第1のトランジス
タのコレクタに接続されることを特徴とする電圧
比較器。 5 実用新案登録請求の範囲第4項記載の電圧比
較器において、前記ラツチ手段は第5および第6
のトランジスタを有しており、前記第5のトラン
ジスタのベースが前記第6のトランジスタのコレ
クタに接続され、前記第6のトランジスタのベー
スが前記第5のトランジスタのコレクタに接続さ
れ、前記第5および第6のトランジスタのエミツ
タが共通となるように接続されていることを特徴
とする電圧比較器。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/877,698 US4147943A (en) | 1978-02-14 | 1978-02-14 | Sensitive high speed clocked comparator |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0264233U true JPH0264233U (ja) | 1990-05-15 |
Family
ID=25370528
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1596279A Pending JPS54117655A (en) | 1978-02-14 | 1979-02-14 | Voltage comparator |
JP1989122680U Pending JPH0264233U (ja) | 1978-02-14 | 1989-10-19 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1596279A Pending JPS54117655A (en) | 1978-02-14 | 1979-02-14 | Voltage comparator |
Country Status (5)
Country | Link |
---|---|
US (1) | US4147943A (ja) |
JP (2) | JPS54117655A (ja) |
DE (1) | DE2905176A1 (ja) |
FR (1) | FR2417112A1 (ja) |
GB (1) | GB2014389B (ja) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4210830A (en) * | 1978-08-28 | 1980-07-01 | Precision Monolithics, Inc. | High speed switching circuit |
JPS5732128A (en) * | 1980-08-04 | 1982-02-20 | Matsushita Electric Ind Co Ltd | Parallel analog to digital converter |
JPS5732126A (en) * | 1980-08-04 | 1982-02-20 | Matsushita Electric Ind Co Ltd | Comparator circuit |
US4571507A (en) * | 1982-05-12 | 1986-02-18 | Hybrid Systems Corporation | Successive approximation analog-to-digital converter |
JPS5912661A (ja) * | 1982-07-13 | 1984-01-23 | Fujitsu Ltd | 閾値可変型差動信号レシ−バ |
US4506171A (en) * | 1982-12-29 | 1985-03-19 | Westinghouse Electric Corp. | Latching type comparator |
US4599526A (en) * | 1983-05-13 | 1986-07-08 | At&T Bell Laboratories | Clocked latching circuit |
US4505075A (en) * | 1983-05-16 | 1985-03-19 | General Electric Company | Fixturing device |
EP0134270B1 (de) * | 1983-08-17 | 1987-06-03 | Ibm Deutschland Gmbh | Phasenteiler mit Verriegelung |
US4668881A (en) * | 1983-12-01 | 1987-05-26 | Rca Corporation | Sense circuit with presetting means |
US4814642A (en) * | 1987-09-10 | 1989-03-21 | Trw Inc. | Switched impedance comparator |
JPH01147915A (ja) * | 1987-12-04 | 1989-06-09 | Hitachi Ltd | 半導体回路 |
EP0320525B1 (de) * | 1987-12-15 | 1991-10-16 | Deutsche ITT Industries GmbH | Abtast-Halte-Stufe und deren Anwendung in Parallel-A/D-Wandlern |
JP2621311B2 (ja) * | 1988-03-10 | 1997-06-18 | 日本電気株式会社 | ラッチ回路付きコンパレータ |
US4926176A (en) * | 1988-08-25 | 1990-05-15 | Brooktree Corporation | Self-timing analog-to-digital converting system |
US5017814A (en) * | 1989-12-13 | 1991-05-21 | Tektronix, Inc. | Metastable sense circuit |
US5030895A (en) * | 1990-08-30 | 1991-07-09 | The United States Of America As Represented By The Secretary Of The Navy | Field emitter array comparator |
TW353535U (en) * | 1990-11-19 | 1999-02-21 | Hitachi Ltd | Memory circuit improved in electrical characteristics |
US5239210A (en) * | 1991-01-15 | 1993-08-24 | Crystal Semiconductor, Inc. | Low distortion unity gain amplifier for dac |
US5166560A (en) * | 1991-08-02 | 1992-11-24 | Bell Communications Research, Inc. | Voltage-controlled variable capacitor |
US5339067A (en) * | 1993-05-07 | 1994-08-16 | Crystal Semiconductor Corporation | Integrated voltage divider and circuit employing an integrated voltage divider |
JPH08335860A (ja) * | 1995-06-08 | 1996-12-17 | Mitsubishi Electric Corp | 差動ラッチ回路 |
US6597303B2 (en) * | 2001-08-16 | 2003-07-22 | Hrl Laboratories, Llc | Comparator with very fast regeneration time constant |
US20030118138A1 (en) * | 2001-12-21 | 2003-06-26 | James Chow | High speed differential data sampling circuit |
US7202708B2 (en) * | 2005-03-10 | 2007-04-10 | Raytheon Company | Comparator with resonant tunneling diodes |
US7688125B2 (en) * | 2006-12-19 | 2010-03-30 | Texas Instruments Incorporated | Latched comparator and methods for using such |
DE102014001698B3 (de) * | 2014-02-04 | 2014-12-11 | Hans Gustat | Getakteter Komparator mit bipolarem Differenzverstärker |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3689752A (en) * | 1970-04-13 | 1972-09-05 | Tektronix Inc | Four-quadrant multiplier circuit |
JPS53137649A (en) * | 1977-05-05 | 1978-12-01 | Tektronix Inc | Voltage comparator |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3621301A (en) * | 1969-12-31 | 1971-11-16 | Ibm | Threshold-responsive regenerative latching circuit |
US3843934A (en) * | 1973-01-31 | 1974-10-22 | Advanced Micro Devices Inc | High speed transistor difference amplifier |
JPS5068046A (ja) * | 1973-10-17 | 1975-06-07 |
-
1978
- 1978-02-14 US US05/877,698 patent/US4147943A/en not_active Expired - Lifetime
-
1979
- 1979-01-24 GB GB7902516A patent/GB2014389B/en not_active Expired
- 1979-02-10 DE DE19792905176 patent/DE2905176A1/de not_active Withdrawn
- 1979-02-13 FR FR7903606A patent/FR2417112A1/fr active Granted
- 1979-02-14 JP JP1596279A patent/JPS54117655A/ja active Pending
-
1989
- 1989-10-19 JP JP1989122680U patent/JPH0264233U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3689752A (en) * | 1970-04-13 | 1972-09-05 | Tektronix Inc | Four-quadrant multiplier circuit |
JPS53137649A (en) * | 1977-05-05 | 1978-12-01 | Tektronix Inc | Voltage comparator |
Also Published As
Publication number | Publication date |
---|---|
FR2417112B1 (ja) | 1985-04-19 |
FR2417112A1 (fr) | 1979-09-07 |
JPS54117655A (en) | 1979-09-12 |
GB2014389A (en) | 1979-08-22 |
US4147943A (en) | 1979-04-03 |
GB2014389B (en) | 1982-04-07 |
DE2905176A1 (de) | 1979-08-16 |
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