JPH0254698B2 - - Google Patents

Info

Publication number
JPH0254698B2
JPH0254698B2 JP58049592A JP4959283A JPH0254698B2 JP H0254698 B2 JPH0254698 B2 JP H0254698B2 JP 58049592 A JP58049592 A JP 58049592A JP 4959283 A JP4959283 A JP 4959283A JP H0254698 B2 JPH0254698 B2 JP H0254698B2
Authority
JP
Japan
Prior art keywords
channel mos
transistor
current
output
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58049592A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59175218A (ja
Inventor
Tomonobu Iwasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58049592A priority Critical patent/JPS59175218A/ja
Publication of JPS59175218A publication Critical patent/JPS59175218A/ja
Publication of JPH0254698B2 publication Critical patent/JPH0254698B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
JP58049592A 1983-03-24 1983-03-24 Ｃｍｏｓインバ−タ Granted JPS59175218A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58049592A JPS59175218A (ja) 1983-03-24 1983-03-24 Ｃｍｏｓインバ−タ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58049592A JPS59175218A (ja) 1983-03-24 1983-03-24 Ｃｍｏｓインバ−タ

Publications (2)

Publication Number Publication Date
JPS59175218A JPS59175218A (ja) 1984-10-04
JPH0254698B2 true JPH0254698B2 (fr) 1990-11-22

Family

ID=12835501

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58049592A Granted JPS59175218A (ja) 1983-03-24 1983-03-24 Ｃｍｏｓインバ−タ

Country Status (1)

Country Link
JP (1) JPS59175218A (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04103489A (ja) * 1990-08-22 1992-04-06 Kunihiro Hayashida ウオータホールカバー

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60141020A (ja) * 1983-12-28 1985-07-26 Nec Corp Ｃｍｏｓ論理回路
JPS6196823A (ja) * 1984-10-17 1986-05-15 Nec Corp 出力回路
JPH0710044B2 (ja) * 1985-12-17 1995-02-01 株式会社東芝 論理回路
JPS6310913A (ja) * 1986-07-02 1988-01-18 Toshiba Corp 雑音除去回路
US4950920A (en) * 1987-09-30 1990-08-21 Kabushiki Kaisha Toshiba Complementary signal output circuit with reduced skew
JP2569750B2 (ja) * 1988-08-23 1997-01-08 三菱電機株式会社 同期型ドライバ回路
US7312636B2 (en) * 2006-02-06 2007-12-25 Mosaid Technologies Incorporated Voltage level shifter circuit
US20080115023A1 (en) * 2006-10-27 2008-05-15 Honeywell International Inc. Set hardened register

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5838032A (ja) * 1981-08-13 1983-03-05 Fujitsu Ltd Ｃ―ｍｏｓインバータ駆動用バッファ回路

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5838032A (ja) * 1981-08-13 1983-03-05 Fujitsu Ltd Ｃ―ｍｏｓインバータ駆動用バッファ回路

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04103489A (ja) * 1990-08-22 1992-04-06 Kunihiro Hayashida ウオータホールカバー

Also Published As

Publication number Publication date
JPS59175218A (ja) 1984-10-04

Similar Documents

Publication Publication Date Title
US20010020858A1 (en) Latch circuit and semiconductor integrated circuit having the latch circuit with control signal having a large voltage amplitude
KR950022129A (ko) 대칭 출력을 가진 전압 제어 발진기 및 상기 발진기에 사용된 논리 게이트
JPS6153759A (ja) 発振回路
JP3270880B2 (ja) 水晶発振回路
JPH0254698B2 (fr)
JP2002290230A (ja) Ｃｍｏｓインバータ
JPH0998083A (ja) レベルシフト回路
JPH0258806B2 (fr)
JPH04239221A (ja) 半導体集積回路
JPH04152711A (ja) 電圧制御発振回路
JPS6080316A (ja) 電圧制御形発振装置
JPH10308654A (ja) 電圧制御発振回路
JPH05268002A (ja) 電圧制御発振器
JPS6049365B2 (ja) 低消費電力水晶発振回路
JPS5842558B2 (ja) アドレス バッファ回路
JPS6036644B2 (ja) 発振回路
JPH0353705A (ja) 半導体集積回路
JP2919187B2 (ja) 基板電位供給回路
JP2000049571A (ja) 電圧制御発振器
KR100236963B1 (ko) 캐패시터를 사용한 씨모스 클럭 버퍼회로
JPH0311659A (ja) 基板バイアス電圧発生回路
JPS5812763B2 (ja) ハツシンカイロ
KR100222397B1 (ko) 클럭 버퍼장치
JPH0645830A (ja) 発振回路
JP2885670B2 (ja) Ｃｒ発振回路