JPH023510B2 - - Google Patents

Info

Publication number
JPH023510B2
JPH023510B2 JP57047710A JP4771082A JPH023510B2 JP H023510 B2 JPH023510 B2 JP H023510B2 JP 57047710 A JP57047710 A JP 57047710A JP 4771082 A JP4771082 A JP 4771082A JP H023510 B2 JPH023510 B2 JP H023510B2
Authority
JP
Japan
Prior art keywords
signal
counter
synchronization signal
frequency
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57047710A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58163989A (ja
Inventor
Kenji Fujita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Tec Corp
Original Assignee
Tokyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electric Co Ltd filed Critical Tokyo Electric Co Ltd
Priority to JP57047710A priority Critical patent/JPS58163989A/ja
Publication of JPS58163989A publication Critical patent/JPS58163989A/ja
Publication of JPH023510B2 publication Critical patent/JPH023510B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Digital Computer Display Output (AREA)
  • Controls And Circuits For Display Device (AREA)
JP57047710A 1982-03-25 1982-03-25 Crtデイスプレイ制御装置における同期信号発生回路 Granted JPS58163989A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57047710A JPS58163989A (ja) 1982-03-25 1982-03-25 Crtデイスプレイ制御装置における同期信号発生回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57047710A JPS58163989A (ja) 1982-03-25 1982-03-25 Crtデイスプレイ制御装置における同期信号発生回路

Publications (2)

Publication Number Publication Date
JPS58163989A JPS58163989A (ja) 1983-09-28
JPH023510B2 true JPH023510B2 (cs) 1990-01-23

Family

ID=12782856

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57047710A Granted JPS58163989A (ja) 1982-03-25 1982-03-25 Crtデイスプレイ制御装置における同期信号発生回路

Country Status (1)

Country Link
JP (1) JPS58163989A (cs)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0229076A (ja) * 1988-07-18 1990-01-31 Nec Corp 周波数切替形電源同期テレビジョン方式

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5728998B2 (cs) * 1974-01-11 1982-06-19
JPS51152915U (cs) * 1975-05-30 1976-12-06
DE2742184C2 (de) * 1977-09-20 1983-09-22 Philips Patentverwaltung Gmbh, 2000 Hamburg Schaltungsanordnung zum Erzeugen eines Schaltsignals entsprechend der Zeilenfrequenz eines Fernsehsignals

Also Published As

Publication number Publication date
JPS58163989A (ja) 1983-09-28

Similar Documents

Publication Publication Date Title
US4853653A (en) Multiple input clock selector
US4408198A (en) Video character generator
JPH0321174A (ja) 表示位置設定を有するtv受像機の複合規格オン・スクリーン表示装置および表示位置設定方法
US5463408A (en) Liquid-crystal display
US3777063A (en) Technique for all-digital television sync generation
JPH023510B2 (cs)
JPH0255975B2 (cs)
EP0056052B1 (en) Synchronizing circuit adaptable for various tv standards
JP2619650B2 (ja) クロック信号発生装置
JP2565248B2 (ja) 分周回路
JPH09200566A (ja) 信号判別回路及び同期信号発生器
JPS58181346A (ja) デ−タ多重化回路
JP2568014B2 (ja) 液晶表示装置の駆動方法、及びその装置
KR890007634Y1 (ko) 다기능 씨알티 제어용 클럭 발생회로
KR0186058B1 (ko) 동기식 클럭 발생회로
JP3028562B2 (ja) 表示装置
KR100243432B1 (ko) 평면 표시기기에서의 화면 변환장치
KR970024896A (ko) 비디오 신호의 수직동기신호 생성장치
KR19980049739U (ko) 클램프 신호 처리회로
KR900008858Y1 (ko) 자화면의 플래싱 기능회로
KR970002437Y1 (ko) 동기신호 발생회로
KR840002746Y1 (ko) 티브이의 시청시간 및 시각표시회로
KR100480559B1 (ko) 색블링킹기능을구비한문자표시장치
JPH01180024A (ja) 同期式論理回路の制御方式
KR0174707B1 (ko) 클럭 발생기