JPH0232651B2 - - Google Patents

Info

Publication number
JPH0232651B2
JPH0232651B2 JP56102979A JP10297981A JPH0232651B2 JP H0232651 B2 JPH0232651 B2 JP H0232651B2 JP 56102979 A JP56102979 A JP 56102979A JP 10297981 A JP10297981 A JP 10297981A JP H0232651 B2 JPH0232651 B2 JP H0232651B2
Authority
JP
Japan
Prior art keywords
instruction
interrupt
address
executed
break point
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56102979A
Other languages
English (en)
Japanese (ja)
Other versions
JPS584461A (ja
Inventor
Yasumasa Nishijima
Shosaku Furubayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
PFU Ltd
Original Assignee
PFU Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by PFU Ltd filed Critical PFU Ltd
Priority to JP56102979A priority Critical patent/JPS584461A/ja
Publication of JPS584461A publication Critical patent/JPS584461A/ja
Publication of JPH0232651B2 publication Critical patent/JPH0232651B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Testing And Monitoring For Control Systems (AREA)
  • Debugging And Monitoring (AREA)
JP56102979A 1981-06-30 1981-06-30 プログラム・デバツク制御方式 Granted JPS584461A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56102979A JPS584461A (ja) 1981-06-30 1981-06-30 プログラム・デバツク制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56102979A JPS584461A (ja) 1981-06-30 1981-06-30 プログラム・デバツク制御方式

Publications (2)

Publication Number Publication Date
JPS584461A JPS584461A (ja) 1983-01-11
JPH0232651B2 true JPH0232651B2 (de) 1990-07-23

Family

ID=14341846

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56102979A Granted JPS584461A (ja) 1981-06-30 1981-06-30 プログラム・デバツク制御方式

Country Status (1)

Country Link
JP (1) JPS584461A (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6140648A (ja) * 1984-08-01 1986-02-26 Matsushita Electric Ind Co Ltd ブレ−クポイント設定装置
JPS6159544A (ja) * 1984-08-31 1986-03-27 Hitachi Ltd マイクロコンピユ−タ用保守プログラム結合方式

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5633742A (en) * 1979-08-25 1981-04-04 Fujitsu Ltd Arithmetic processor having debug processing function

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5633742A (en) * 1979-08-25 1981-04-04 Fujitsu Ltd Arithmetic processor having debug processing function

Also Published As

Publication number Publication date
JPS584461A (ja) 1983-01-11

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