JPH0225155B2 - - Google Patents

Info

Publication number
JPH0225155B2
JPH0225155B2 JP55005876A JP587680A JPH0225155B2 JP H0225155 B2 JPH0225155 B2 JP H0225155B2 JP 55005876 A JP55005876 A JP 55005876A JP 587680 A JP587680 A JP 587680A JP H0225155 B2 JPH0225155 B2 JP H0225155B2
Authority
JP
Japan
Prior art keywords
input
flip
logic
flop
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP55005876A
Other languages
English (en)
Japanese (ja)
Other versions
JPS55129772A (en
Inventor
Keeneman Berunto
Muhya Yooahimu
Tsuiihofu Gyuntaa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Corp
Original Assignee
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Corp filed Critical Siemens Corp
Publication of JPS55129772A publication Critical patent/JPS55129772A/ja
Publication of JPH0225155B2 publication Critical patent/JPH0225155B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/27—Built-in tests

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Logic Circuits (AREA)
JP587680A 1979-01-23 1980-01-23 Logic block for integrated digital circuit Granted JPS55129772A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19792902375 DE2902375C2 (de) 1979-01-23 1979-01-23 Logikbaustein für integrierte Digitalschaltungen

Publications (2)

Publication Number Publication Date
JPS55129772A JPS55129772A (en) 1980-10-07
JPH0225155B2 true JPH0225155B2 (enrdf_load_html_response) 1990-05-31

Family

ID=6061148

Family Applications (1)

Application Number Title Priority Date Filing Date
JP587680A Granted JPS55129772A (en) 1979-01-23 1980-01-23 Logic block for integrated digital circuit

Country Status (4)

Country Link
JP (1) JPS55129772A (enrdf_load_html_response)
DE (1) DE2902375C2 (enrdf_load_html_response)
FR (1) FR2449945A1 (enrdf_load_html_response)
GB (1) GB2041546B (enrdf_load_html_response)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5618766A (en) * 1979-07-26 1981-02-21 Fujitsu Ltd Testing apparatus for logic circuit
US4357703A (en) * 1980-10-09 1982-11-02 Control Data Corporation Test system for LSI circuits resident on LSI chips
JPS5789154A (en) * 1980-11-25 1982-06-03 Nec Corp Logical integrated circuit
JPS57106218A (en) * 1980-12-23 1982-07-02 Fujitsu Ltd Cmos type dff circuit
US4551838A (en) * 1983-06-20 1985-11-05 At&T Bell Laboratories Self-testing digital circuits
US4680539A (en) * 1983-12-30 1987-07-14 International Business Machines Corp. General linear shift register
DE3682305D1 (de) * 1985-03-23 1991-12-12 Int Computers Ltd Integrierte digitale schaltungen.
GB2178175A (en) * 1985-07-18 1987-02-04 British Telecomm Logic testing circuit
JPH07122653B2 (ja) * 1986-04-21 1995-12-25 ソニー株式会社 試験回路
JP2508427B2 (ja) * 1986-09-11 1996-06-19 ソニー株式会社 Ｉｃ回路
US4817093A (en) * 1987-06-18 1989-03-28 International Business Machines Corporation Method of partitioning, testing and diagnosing a VLSI multichip package and associated structure
US4870346A (en) * 1987-09-14 1989-09-26 Texas Instruments Incorporated Distributed pseudo random sequence control with universal polynomial function generator for LSI/VLSI test systems
JPH01155281A (ja) * 1987-12-11 1989-06-19 Nec Corp 論理テスト回路
JP2770617B2 (ja) * 1991-09-05 1998-07-02 日本電気株式会社 テスト回路
DE19604375C2 (de) * 1996-02-07 1999-04-29 Martin Kuboschek Verfahren zur Auswertung von Testantworten zu prüfender digitaler Schaltungen und Schaltungsanordnung zur Durchführung des Verfahrens

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3961254A (en) * 1974-12-20 1976-06-01 International Business Machines Corporation Testing embedded arrays
US3961252A (en) * 1974-12-20 1976-06-01 International Business Machines Corporation Testing embedded arrays

Also Published As

Publication number Publication date
FR2449945A1 (fr) 1980-09-19
DE2902375A1 (de) 1980-07-31
FR2449945B1 (enrdf_load_html_response) 1985-03-01
JPS55129772A (en) 1980-10-07
GB2041546B (en) 1983-04-07
GB2041546A (en) 1980-09-10
DE2902375C2 (de) 1984-05-17

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