JPH0218585B2 - - Google Patents
Info
- Publication number
- JPH0218585B2 JPH0218585B2 JP58066266A JP6626683A JPH0218585B2 JP H0218585 B2 JPH0218585 B2 JP H0218585B2 JP 58066266 A JP58066266 A JP 58066266A JP 6626683 A JP6626683 A JP 6626683A JP H0218585 B2 JPH0218585 B2 JP H0218585B2
- Authority
- JP
- Japan
- Prior art keywords
- heater
- integrated circuit
- diode
- board
- collets
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000000758 substrate Substances 0.000 claims description 14
- 239000011159 matrix material Substances 0.000 claims description 11
- 238000000034 method Methods 0.000 claims description 8
- 238000004519 manufacturing process Methods 0.000 claims description 6
- 230000002265 prevention Effects 0.000 claims 1
- 239000004020 conductor Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 8
- 229910000679 solder Inorganic materials 0.000 description 6
- 239000010409 thin film Substances 0.000 description 5
- 238000007747 plating Methods 0.000 description 4
- 239000010408 film Substances 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 238000005476 soldering Methods 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58066266A JPS59191394A (ja) | 1983-04-13 | 1983-04-13 | 集積回路基板の製造方法及び製造装置 |
| DE19833319339 DE3319339A1 (de) | 1982-05-31 | 1983-05-27 | Treiberanordnung fuer eine x-y-elektrodenmatrix |
| US07/658,436 US5137205A (en) | 1982-05-31 | 1991-02-20 | Symmetrical circuit arrangement for a x-y matrix electrode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58066266A JPS59191394A (ja) | 1983-04-13 | 1983-04-13 | 集積回路基板の製造方法及び製造装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59191394A JPS59191394A (ja) | 1984-10-30 |
| JPH0218585B2 true JPH0218585B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1990-04-26 |
Family
ID=13310865
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58066266A Granted JPS59191394A (ja) | 1982-05-31 | 1983-04-13 | 集積回路基板の製造方法及び製造装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59191394A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
-
1983
- 1983-04-13 JP JP58066266A patent/JPS59191394A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59191394A (ja) | 1984-10-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3264147B2 (ja) | 半導体装置、半導体装置用インターポーザ及びその製造方法 | |
| US5519936A (en) | Method of making an electronic package with a thermally conductive support member having a thin circuitized substrate and semiconductor device bonded thereto | |
| US5661086A (en) | Process for manufacturing a plurality of strip lead frame semiconductor devices | |
| US5475264A (en) | Arrangement having multilevel wiring structure used for electronic component module | |
| KR100372153B1 (ko) | 다층리드프레임 | |
| JPH06224246A (ja) | 半導体素子用高多端子化パッケージ | |
| JPH06283650A (ja) | 半導体装置 | |
| US6670706B2 (en) | Semiconductor device including a semiconductor pellet having bump electrodes connected to pad electrodes of an interconnect board and method for manufacturing same | |
| US20070126107A1 (en) | Multi-chip semiconductor connector assembly method | |
| JPH0546930B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
| KR100198682B1 (ko) | 반도체 디바이스 제조방법 | |
| JPS6250313B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
| JPH0218585B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
| US5137205A (en) | Symmetrical circuit arrangement for a x-y matrix electrode | |
| JP3314574B2 (ja) | 半導体装置の製造方法 | |
| JPH08162599A (ja) | 半導体装置の製造方法 | |
| JP3234614B2 (ja) | 半導体装置及びその製造方法 | |
| JPH10125721A (ja) | 半導体装置 | |
| KR960000221B1 (ko) | 반도체 패키지 | |
| JP3509532B2 (ja) | 半導体装置用基板、半導体装置及びその製造方法並びに電子機器 | |
| JP3203889B2 (ja) | 半導体装置 | |
| JP3045940B2 (ja) | 半導体装置およびその製造方法 | |
| JP2629460B2 (ja) | 混成集積回路装置 | |
| JPH10173000A (ja) | 高密度実装用半導体パッケージ及びその実装方法 | |
| JPS6094792A (ja) | 回路基板の製造装置 |