JPH0218503B2 - - Google Patents

Info

Publication number
JPH0218503B2
JPH0218503B2 JP57226612A JP22661282A JPH0218503B2 JP H0218503 B2 JPH0218503 B2 JP H0218503B2 JP 57226612 A JP57226612 A JP 57226612A JP 22661282 A JP22661282 A JP 22661282A JP H0218503 B2 JPH0218503 B2 JP H0218503B2
Authority
JP
Japan
Prior art keywords
circuit
cpu
output
control register
abnormal signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57226612A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59119453A (ja
Inventor
Hidenori Hayashi
Satoru Tsushima
Noryuki Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57226612A priority Critical patent/JPS59119453A/ja
Publication of JPS59119453A publication Critical patent/JPS59119453A/ja
Publication of JPH0218503B2 publication Critical patent/JPH0218503B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Emergency Alarm Devices (AREA)
  • Alarm Systems (AREA)
JP57226612A 1982-12-27 1982-12-27 Ｃｐｕ暴走監視回路 Granted JPS59119453A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57226612A JPS59119453A (ja) 1982-12-27 1982-12-27 Ｃｐｕ暴走監視回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57226612A JPS59119453A (ja) 1982-12-27 1982-12-27 Ｃｐｕ暴走監視回路

Publications (2)

Publication Number Publication Date
JPS59119453A JPS59119453A (ja) 1984-07-10
JPH0218503B2 true JPH0218503B2 (enrdf_load_stackoverflow) 1990-04-25

Family

ID=16847923

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57226612A Granted JPS59119453A (ja) 1982-12-27 1982-12-27 Ｃｐｕ暴走監視回路

Country Status (1)

Country Link
JP (1) JPS59119453A (enrdf_load_stackoverflow)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61296443A (ja) * 1985-06-24 1986-12-27 Mitsubishi Electric Corp ウオツチドツグ・タイマ
JPS6260038A (ja) * 1985-09-10 1987-03-16 Hochiki Corp ウオツチドツグ回路
JPS6310248A (ja) * 1986-06-30 1988-01-16 Nec Corp マイクロプロセツサの異常状態検出方式
JPH01211138A (ja) * 1988-02-19 1989-08-24 Fujitsu Ltd 計算機システムの監視回路用リセット回路
JPH01172152U (enrdf_load_stackoverflow) * 1988-05-24 1989-12-06
JPH0325943U (enrdf_load_stackoverflow) * 1989-07-24 1991-03-18
US7432504B2 (en) * 2005-09-27 2008-10-07 Xerox Corporation Dicorotron wire assembly removal and storage tool
JP5625949B2 (ja) * 2011-01-25 2014-11-19 日本電気株式会社 システム監視装置及びシステム監視方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56103723A (en) * 1980-01-23 1981-08-19 Nippon Denso Co Ltd Automatic reset method for computer

Also Published As

Publication number Publication date
JPS59119453A (ja) 1984-07-10

Similar Documents

Publication Publication Date Title
EP0497380B1 (en) Microcomputer having a watchdog timer
US5491787A (en) Fault tolerant digital computer system having two processors which periodically alternate as master and slave
JPH0218503B2 (enrdf_load_stackoverflow)
JPS63191245A (ja) 暴走装置の復帰制御方式
JP2998804B2 (ja) マルチマイクロプロセッサシステム
JPS6363935B2 (enrdf_load_stackoverflow)
JP3161444B2 (ja) 障害ロギングシステム、方法およびプログラムを記憶した記憶媒体
JPS5878239A (ja) 演算制御回路
JPH0756774A (ja) ウォッチドッグタイマ
JPH0430245A (ja) マルチプロセッサ制御方式
JP2814587B2 (ja) ウォッチドッグタイマ
JP2702972B2 (ja) メモリ初期設定方式
JPS63174158A (ja) マルチプロセツサシステム
JPH04333963A (ja) 障害処理方式
JPS60220448A (ja) マルチｃｐｕシステムの相互チエツク方法
JP2583617B2 (ja) マルチプロセッサシステム
KR200183293Y1 (ko) 개인용 컴퓨터 이상발생복구장치
JPS6033474Y2 (ja) コンピュ−タ異常検出回路
JPS61145617A (ja) 電源切断回路
JPS62209627A (ja) デ−タ処理装置
JPS622684Y2 (enrdf_load_stackoverflow)
JPH01310422A (ja) マイクロコンピュータのリセット回路
JPH03252831A (ja) Ｄｍａ転送によるｒａｓ情報収集方法
JPS6029856A (ja) マルチプロセツサ・システムにおけるロ−カルメモリのアクセス制御方式
JPS6336431Y2 (enrdf_load_stackoverflow)