JPH02162273A - テストモード機能遂行入力回路 - Google Patents

テストモード機能遂行入力回路

Info

Publication number
JPH02162273A
JPH02162273A JP1224315A JP22431589A JPH02162273A JP H02162273 A JPH02162273 A JP H02162273A JP 1224315 A JP1224315 A JP 1224315A JP 22431589 A JP22431589 A JP 22431589A JP H02162273 A JPH02162273 A JP H02162273A
Authority
JP
Japan
Prior art keywords
input
node
inverter
output
nand gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1224315A
Other languages
English (en)
Japanese (ja)
Inventor
Hak-Kun Kim
金　學根
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Goldstar Electron Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Goldstar Electron Co Ltd filed Critical Goldstar Electron Co Ltd
Publication of JPH02162273A publication Critical patent/JPH02162273A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31701—Arrangements for setting the Unit Under Test [UUT] in a test mode
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318522—Test of Sequential circuits
    • G01R31/318527—Test of counters

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Quality & Reliability (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Manipulation Of Pulses (AREA)
JP1224315A 1988-08-30 1989-08-30 テストモード機能遂行入力回路 Pending JPH02162273A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1019880011062A KR950011803B1 (ko) 1988-08-30 1988-08-30 테스트 모우드 기능 수행, 입력 회로
KR11062 1988-08-30

Publications (1)

Publication Number Publication Date
JPH02162273A true JPH02162273A (ja) 1990-06-21

Family

ID=19277257

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1224315A Pending JPH02162273A (ja) 1988-08-30 1989-08-30 テストモード機能遂行入力回路

Country Status (4)

Country Link
JP (1) JPH02162273A (de)
KR (1) KR950011803B1 (de)
DE (1) DE3928559A1 (de)
GB (1) GB2222689A (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010181230A (ja) * 2009-02-04 2010-08-19 Rohm Co Ltd 半導体装置

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8829932B2 (en) * 2010-07-23 2014-09-09 Fairchild Semiconductor Corporation No pin test mode
KR102291002B1 (ko) * 2019-05-23 2021-08-20 우경제 곤약 떡 제조 방법

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57133656A (en) * 1981-02-12 1982-08-18 Nec Corp Semiconductor integrated circuit incorporated with test circuit
JPS5928986A (ja) * 1982-08-10 1984-02-15 松下電工株式会社 電気かみそりの外刃

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2917126C2 (de) * 1979-04-27 1983-01-27 Philips Patentverwaltung Gmbh, 2000 Hamburg Verfahren zum Prüfen einer integrierten Schaltung und Anordnung zur Durchführung des Verfahrens
JPS62170094A (ja) * 1986-01-21 1987-07-27 Mitsubishi Electric Corp 半導体記憶回路
US4733168A (en) * 1986-03-21 1988-03-22 Harris Corporation Test enabling circuit for enabling overhead test circuitry in programmable devices
JP2721151B2 (ja) * 1986-04-01 1998-03-04 株式会社東芝 半導体集積回路装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57133656A (en) * 1981-02-12 1982-08-18 Nec Corp Semiconductor integrated circuit incorporated with test circuit
JPS5928986A (ja) * 1982-08-10 1984-02-15 松下電工株式会社 電気かみそりの外刃

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010181230A (ja) * 2009-02-04 2010-08-19 Rohm Co Ltd 半導体装置

Also Published As

Publication number Publication date
KR950011803B1 (ko) 1995-10-10
GB2222689A (en) 1990-03-14
KR900003725A (ko) 1990-03-26
DE3928559A1 (de) 1990-04-05
GB8919372D0 (en) 1989-10-11

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