JPH02140879U - - Google Patents

Info

Publication number
JPH02140879U
JPH02140879U JP4932889U JP4932889U JPH02140879U JP H02140879 U JPH02140879 U JP H02140879U JP 4932889 U JP4932889 U JP 4932889U JP 4932889 U JP4932889 U JP 4932889U JP H02140879 U JPH02140879 U JP H02140879U
Authority
JP
Japan
Prior art keywords
wiring board
foot
printed wiring
patterns
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4932889U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4932889U priority Critical patent/JPH02140879U/ja
Publication of JPH02140879U publication Critical patent/JPH02140879U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案のプリント配線基板の実装方法
を示す図、第2図は従来のプリント配線基板の実
装方法の基本を示す図、第3図は従来のプリント
配線基板の実装方法の実施例を示す図、第4図は
従来のプリント配線基板の実装方法の他の一実施
例を示す図、第5図は従来のプリント配線基板の
実装方法の更に他の一実施例を示す図、である。 図において、1……プリント配線基板、2……
絶縁基板、3……リードパターン、4……フツト
パターン、5……電子部品(IC)、6……端子
、7……半田ゴテ、8……半田、12……孔、を
示す。
Figure 1 is a diagram showing the printed wiring board mounting method of the present invention, Figure 2 is a diagram showing the basics of the conventional printed wiring board mounting method, and Figure 3 is an example of the conventional printed wiring board mounting method. FIG. 4 is a diagram showing another embodiment of the conventional printed wiring board mounting method, and FIG. 5 is a diagram showing still another embodiment of the conventional printed wiring board mounting method. be. In the figure, 1... printed wiring board, 2...
Insulating substrate, 3... Lead pattern, 4... Foot pattern, 5... Electronic component (IC), 6... Terminal, 7... Soldering iron, 8... Solder, 12... Hole.

Claims (1)

【実用新案登録請求の範囲】 電子部品5の端子6が半田付けされるフツトパ
ターン4を、所定の間隔をおいて複数並べて配列
したプリント配線基板1において、 前記フツトパターン4の配列の最端部のフツト
パターンに、供給された半田8の余剰分を流し込
ませるための孔12を設けたことを特徴とするプ
リント配線基板。
[Claims for Utility Model Registration] In a printed wiring board 1 in which a plurality of foot patterns 4 to which terminals 6 of electronic components 5 are soldered are arranged side by side at predetermined intervals, the end of the array of foot patterns 4 is provided. 1. A printed wiring board characterized in that a hole 12 is provided in the foot pattern for allowing an excess amount of solder 8 to be poured into the foot pattern.
JP4932889U 1989-04-25 1989-04-25 Pending JPH02140879U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4932889U JPH02140879U (en) 1989-04-25 1989-04-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4932889U JPH02140879U (en) 1989-04-25 1989-04-25

Publications (1)

Publication Number Publication Date
JPH02140879U true JPH02140879U (en) 1990-11-26

Family

ID=31566920

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4932889U Pending JPH02140879U (en) 1989-04-25 1989-04-25

Country Status (1)

Country Link
JP (1) JPH02140879U (en)

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