JPS6316479U - - Google Patents

Info

Publication number
JPS6316479U
JPS6316479U JP10942786U JP10942786U JPS6316479U JP S6316479 U JPS6316479 U JP S6316479U JP 10942786 U JP10942786 U JP 10942786U JP 10942786 U JP10942786 U JP 10942786U JP S6316479 U JPS6316479 U JP S6316479U
Authority
JP
Japan
Prior art keywords
land
wiring board
printed wiring
dip
soldering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10942786U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10942786U priority Critical patent/JPS6316479U/ja
Publication of JPS6316479U publication Critical patent/JPS6316479U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は印刷配線板の一部を示す平面図、第2
図は電子部品を載置した状態の印刷配線板の一部
を示す平面図、第3図a、第3図b、第3図c、
第3図dはデイツプ半田付け作業工程を説明する
ための正面図である。 1…印刷配線板、2…ランド、3…スルーホー
ルランド、4…電子部品、6…接続端子、7…デ
イツプ半田。
Figure 1 is a plan view showing a part of the printed wiring board;
The figures are plan views showing a part of the printed wiring board with electronic components placed on it, Figure 3a, Figure 3b, Figure 3c,
FIG. 3d is a front view for explaining the dip soldering process. 1...Printed wiring board, 2...Land, 3...Through hole land, 4...Electronic component, 6...Connection terminal, 7...Dip solder.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電子部品に設けられた複数個の接続端子をデイ
ツプ半田するランドと、このランドの隣りに間隔
をおいて形成するスルーホールランドとを設けた
ことを特徴とする電子部品搭載用印刷配線板。
A printed wiring board for mounting electronic components, characterized in that a land is provided for dip-soldering a plurality of connection terminals provided on an electronic component, and a through-hole land is formed at intervals next to the land.
JP10942786U 1986-07-18 1986-07-18 Pending JPS6316479U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10942786U JPS6316479U (en) 1986-07-18 1986-07-18

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10942786U JPS6316479U (en) 1986-07-18 1986-07-18

Publications (1)

Publication Number Publication Date
JPS6316479U true JPS6316479U (en) 1988-02-03

Family

ID=30987515

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10942786U Pending JPS6316479U (en) 1986-07-18 1986-07-18

Country Status (1)

Country Link
JP (1) JPS6316479U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006303068A (en) * 2005-04-19 2006-11-02 Mitsubishi Electric Corp Printed circuit board and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006303068A (en) * 2005-04-19 2006-11-02 Mitsubishi Electric Corp Printed circuit board and manufacturing method thereof
JP4545629B2 (en) * 2005-04-19 2010-09-15 三菱電機株式会社 Printed circuit board

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