JPH0183334U - - Google Patents

Info

Publication number
JPH0183334U
JPH0183334U JP17918387U JP17918387U JPH0183334U JP H0183334 U JPH0183334 U JP H0183334U JP 17918387 U JP17918387 U JP 17918387U JP 17918387 U JP17918387 U JP 17918387U JP H0183334 U JPH0183334 U JP H0183334U
Authority
JP
Japan
Prior art keywords
transistor chip
insulator
heat dissipation
dissipation board
external lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17918387U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP17918387U priority Critical patent/JPH0183334U/ja
Publication of JPH0183334U publication Critical patent/JPH0183334U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)

Description

【図面の簡単な説明】
第１図ａ及びｂは本考案の一実施例の平面模式
図及び側面模式図、第２図ａ及びｂは従来の樹脂
封止形半導体装置の一例の平面模式図及び側面模
式図である。 １Ｂ……放熱基板、２……トランジスタチツプ
、３……樹脂部、４……エミツタリード、７……
セラミツク基板、８……メタライズ層、ｅ……
ボンデイングリード。

Claims (1)

    【実用新案登録請求の範囲】
  1. 上面の導電体にバイポーラ（ＭＯＳ）のトラン
    ジスタチツプを載置する絶縁体と、該絶縁体を載
    置しかつ第１の外部リードと一体構造の放熱基板
    と、該放熱基板と絶縁された第２の外部リードと
    、前記トランジスタチツプのコレクタ（ドレイン
    ）を除く他の電極の一つと前記第１の外部リード
    の内部点とを接続する第１のボンデイングワイヤ
    と、前記トランジスタチツプのコレクタ（ドレイ
    ン）電極と前記第２の外部リードの内部点とを接
    続する第２のボンデイングワイヤと、前記トラン
    ジスタチツプと前記絶縁体と前記第１及び第２の
    外部リードの内部とを封止する樹脂部とを含むこ
    とを特徴とする樹脂封止形半導体装置。
JP17918387U 1987-11-24 1987-11-24 Pending JPH0183334U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17918387U JPH0183334U (ja) 1987-11-24 1987-11-24

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17918387U JPH0183334U (ja) 1987-11-24 1987-11-24

Publications (1)

Publication Number Publication Date
JPH0183334U true JPH0183334U (ja) 1989-06-02

Family

ID=31470759

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17918387U Pending JPH0183334U (ja) 1987-11-24 1987-11-24

Country Status (1)

Country Link
JP (1) JPH0183334U (ja)

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