JPS6237934U - - Google Patents
Info
- Publication number
- JPS6237934U JPS6237934U JP1985130654U JP13065485U JPS6237934U JP S6237934 U JPS6237934 U JP S6237934U JP 1985130654 U JP1985130654 U JP 1985130654U JP 13065485 U JP13065485 U JP 13065485U JP S6237934 U JPS6237934 U JP S6237934U
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- semiconductor substrate
- lead member
- electrode
- fixed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 7
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 2
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 2
- 229910000679 solder Inorganic materials 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 claims 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical class O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 1
- 239000010410 layer Substances 0.000 claims 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims 1
- 229910052814 silicon oxide Inorganic materials 0.000 claims 1
- 239000002356 single layer Substances 0.000 claims 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05073—Single internal layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05541—Structure
- H01L2224/05548—Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Description
第1図は本考案の実施例に係わるマルチエミツ
タ型のパワートランジスタを示す断面図、第2図
は従来のマルチエミツタ型のパワートランジスタ
を示す断面図、第3図は第1図及び第2図のパワ
ートランジスタのエミツタ電極とベース電極との
一部を示す平面図、第4図は第2図のトランジス
タにおける層割れを説明するための断面図である
。 1…シリコン基板、4…ベース領域、5…エミ
ツタ領域、6…絶縁膜、6a…SiO2膜、6b
…Si3N4膜、7…エミツタ電極、7a…配線
部分、7b…パツド部分、11…半田。
タ型のパワートランジスタを示す断面図、第2図
は従来のマルチエミツタ型のパワートランジスタ
を示す断面図、第3図は第1図及び第2図のパワ
ートランジスタのエミツタ電極とベース電極との
一部を示す平面図、第4図は第2図のトランジス
タにおける層割れを説明するための断面図である
。 1…シリコン基板、4…ベース領域、5…エミ
ツタ領域、6…絶縁膜、6a…SiO2膜、6b
…Si3N4膜、7…エミツタ電極、7a…配線
部分、7b…パツド部分、11…半田。
Claims (1)
- 【実用新案登録請求の範囲】 (1) pn接合を有する半導体基板と、 前記半導体基板の主面上に選択的に設けられて
いる絶縁膜と、 前記半導体基板上及び前記絶縁膜上に設けられ
ている電極と、 前記電極に固着されているリード部材と、 を有し、且つ前記電極における前記リード部材の
固着部分の一部又は全部が前記絶縁膜上に設けら
れている半導体装置において、 前記絶縁膜の前記pn接合を覆う部分はシリコ
ン酸化膜とシリコン窒化膜との二層構成とし、 前記絶縁膜における前記固着部分の一部又は全
部に対応する部分はSiO2膜のみの一層構成と
したことを特徴とする半導体装置。 (2) 前記半導体基板は、トランジスタを構成す
る基板であり、前記リード部材は前記トランジス
タのエミツタリード線である実用新案登録請求の
範囲第1項記載の半導体装置。 (3) 前記リード部材は半田によつて前記電極に
固着されているものである実用新案登録請求の範
囲第1項又は第2項記載の半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985130654U JPS6237934U (ja) | 1985-08-27 | 1985-08-27 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985130654U JPS6237934U (ja) | 1985-08-27 | 1985-08-27 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6237934U true JPS6237934U (ja) | 1987-03-06 |
Family
ID=31028359
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1985130654U Pending JPS6237934U (ja) | 1985-08-27 | 1985-08-27 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6237934U (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04272419A (ja) * | 1991-02-26 | 1992-09-29 | Toyota Motor Corp | 内燃機関のフィルタ再生制御装置 |
JPH0791227A (ja) * | 1992-09-09 | 1995-04-04 | J Eberspaecher | 粒子フィルタの負荷状態の判別方法及び装置 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5315759A (en) * | 1976-07-28 | 1978-02-14 | Hitachi Ltd | Electronic parts |
JPS57159035A (en) * | 1981-03-26 | 1982-10-01 | Yamagata Nippon Denki Kk | Manufacture of semiconductor device |
-
1985
- 1985-08-27 JP JP1985130654U patent/JPS6237934U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5315759A (en) * | 1976-07-28 | 1978-02-14 | Hitachi Ltd | Electronic parts |
JPS57159035A (en) * | 1981-03-26 | 1982-10-01 | Yamagata Nippon Denki Kk | Manufacture of semiconductor device |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04272419A (ja) * | 1991-02-26 | 1992-09-29 | Toyota Motor Corp | 内燃機関のフィルタ再生制御装置 |
JPH0791227A (ja) * | 1992-09-09 | 1995-04-04 | J Eberspaecher | 粒子フィルタの負荷状態の判別方法及び装置 |