JPS6294631U - - Google Patents
Info
- Publication number
- JPS6294631U JPS6294631U JP1985185575U JP18557585U JPS6294631U JP S6294631 U JPS6294631 U JP S6294631U JP 1985185575 U JP1985185575 U JP 1985185575U JP 18557585 U JP18557585 U JP 18557585U JP S6294631 U JPS6294631 U JP S6294631U
- Authority
- JP
- Japan
- Prior art keywords
- passivation film
- base metal
- circuit part
- wiring part
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 4
- 239000010953 base metal Substances 0.000 claims description 3
- 238000002161 passivation Methods 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims description 2
- 239000002184 metal Substances 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Description
第１図は本考案による半導体素子の一実施例の
断面図、第２図は従来の半導体素子の断面図であ
る。 １……シリコン基板、２……配線、３……パシ
ベーシヨン膜、４……電極部、５……下地金属、
６……バンプ、７……回路部、８……防湿層。
断面図、第２図は従来の半導体素子の断面図であ
る。 １……シリコン基板、２……配線、３……パシ
ベーシヨン膜、４……電極部、５……下地金属、
６……バンプ、７……回路部、８……防湿層。
Claims (1)
- 回路部と配線部とを有し、前記配線部上に設け
られた下地金属を介してバンプにより基板に接続
されるとともに前記回路部をパシベーシヨン膜で
被覆した半導体素子において、前記回路部上に前
記パシベーシヨン膜を介して前記下地金属と同一
金属から成る防湿層を形成したことを特徴とする
半導体素子。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985185575U JPS6294631U (ja) | 1985-12-03 | 1985-12-03 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985185575U JPS6294631U (ja) | 1985-12-03 | 1985-12-03 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6294631U true JPS6294631U (ja) | 1987-06-17 |
Family
ID=31134331
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985185575U Pending JPS6294631U (ja) | 1985-12-03 | 1985-12-03 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6294631U (ja) |
-
1985
- 1985-12-03 JP JP1985185575U patent/JPS6294631U/ja active Pending