JPH0123806B2 - - Google Patents

Info

Publication number
JPH0123806B2
JPH0123806B2 JP56020819A JP2081981A JPH0123806B2 JP H0123806 B2 JPH0123806 B2 JP H0123806B2 JP 56020819 A JP56020819 A JP 56020819A JP 2081981 A JP2081981 A JP 2081981A JP H0123806 B2 JPH0123806 B2 JP H0123806B2
Authority
JP
Japan
Prior art keywords
bit
register
rounding
numerical
bits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56020819A
Other languages
English (en)
Japanese (ja)
Other versions
JPS56129946A (en
Inventor
Efu Paruma Jon
Daburyu Rabeneru Buruusu
Neiu Rafuii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=22393800&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=JPH0123806(B2) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Intel Corp filed Critical Intel Corp
Publication of JPS56129946A publication Critical patent/JPS56129946A/ja
Priority to CA000413096A priority Critical patent/CA1190618A/en
Publication of JPH0123806B2 publication Critical patent/JPH0123806B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0763—Error or fault detection not based on redundancy by bit configuration check, e.g. of formats or tags
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/01—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising
    • G06F5/012—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising in floating-point computations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/552—Powers or roots, e.g. Pythagorean sums
    • G06F7/5525—Roots or inverse roots of single operands
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49905—Exception handling
    • G06F7/4991—Overflow or underflow
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49942—Significance control
    • G06F7/49947—Rounding
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49942—Significance control
    • G06F7/49947—Rounding
    • G06F7/49957—Implementation of IEEE-754 Standard
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49942—Significance control
    • G06F7/49947—Rounding
    • G06F7/49963—Rounding to nearest

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Computing Systems (AREA)
  • Software Systems (AREA)
  • Quality & Reliability (AREA)
  • Mathematical Physics (AREA)
  • Nonlinear Science (AREA)
  • Complex Calculations (AREA)
JP2081981A 1980-02-13 1981-02-13 Method for computing numerical value and numerical data processor Granted JPS56129946A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CA000413096A CA1190618A (en) 1981-02-13 1982-10-08 Non-contact type power collecting device for magnetically levitated vehicle type railway transportation system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/120,995 US4338675A (en) 1980-02-13 1980-02-13 Numeric data processor

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP63309761A Division JPH02138620A (ja) 1980-02-13 1988-12-07 数値量を計算する方法および数値データ処理装置

Publications (2)

Publication Number Publication Date
JPS56129946A JPS56129946A (en) 1981-10-12
JPH0123806B2 true JPH0123806B2 (en, 2012) 1989-05-09

Family

ID=22393800

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2081981A Granted JPS56129946A (en) 1980-02-13 1981-02-13 Method for computing numerical value and numerical data processor
JP63309761A Pending JPH02138620A (ja) 1980-02-13 1988-12-07 数値量を計算する方法および数値データ処理装置

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP63309761A Pending JPH02138620A (ja) 1980-02-13 1988-12-07 数値量を計算する方法および数値データ処理装置

Country Status (2)

Country Link
US (1) US4338675A (en, 2012)
JP (2) JPS56129946A (en, 2012)

Families Citing this family (123)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4484276A (en) * 1981-02-19 1984-11-20 Sperry Corporation Shift matrix preselector control circuit
US4442498A (en) * 1981-04-23 1984-04-10 Josh Rosen Arithmetic unit for use in data processing systems
US4464716A (en) * 1981-05-22 1984-08-07 Data General Corporation Digital data processing system using unique formatting techniques for performing arithmetic ALU operations
DE3144015A1 (de) * 1981-11-05 1983-05-26 Ulrich Prof. Dr. 7500 Karlsruhe Kulisch "schaltungsanordnung und verfahren zur bildung von skalarprodukten und summen von gleitkommazahlen mit maximaler genauigkeit"
US4577282A (en) 1982-02-22 1986-03-18 Texas Instruments Incorporated Microcomputer system for digital signal processing
US4608634A (en) * 1982-02-22 1986-08-26 Texas Instruments Incorporated Microcomputer with offset in store-accumulator operations
US5854907A (en) * 1982-02-22 1998-12-29 Texas Instruments Incorporated Microcomputer for digital signal processing having on-chip memory and external memory access
US4488252A (en) * 1982-02-22 1984-12-11 Raytheon Company Floating point addition architecture
US4491910A (en) * 1982-02-22 1985-01-01 Texas Instruments Incorporated Microcomputer having data shift within memory
US4509116A (en) * 1982-04-21 1985-04-02 Digital Equipment Corporation Special instruction processing unit for data processing system
JPS592143A (ja) * 1982-06-29 1984-01-07 Hitachi Ltd 情報処理装置
EP0108664A3 (en) * 1982-10-04 1987-10-28 Fairchild Semiconductor Corporation Floating point microprocessor
US4928223A (en) * 1982-10-06 1990-05-22 Fairchild Semiconductor Corporation Floating point microprocessor with directable two level microinstructions
JPS5979350A (ja) * 1982-10-29 1984-05-08 Toshiba Corp 浮動小数点演算装置
JPS59154564A (ja) * 1983-02-24 1984-09-03 Hitachi Ltd プログラマブルコントロ−ラ
DE3486464D1 (de) * 1983-04-18 1998-02-19 Motorola Inc Verfahren und Vorrichtung zum Koordinieren einer Instruktionsausführung durch eine Zusatzdatenverarbeitungseinheit
US4758978A (en) * 1983-04-18 1988-07-19 Motorola, Inc. Method and apparatus for selectively evaluating an effective address for a coprocessor
US4589084A (en) * 1983-05-16 1986-05-13 Rca Corporation Apparatus for symmetrically truncating two's complement binary signals as for use with interleaved quadrature signals
JPS59216245A (ja) * 1983-05-25 1984-12-06 Nec Corp 正規化回路
US4594679A (en) * 1983-07-21 1986-06-10 International Business Machines Corporation High speed hardware multiplier for fixed floating point operands
JPS6043751A (ja) * 1983-08-18 1985-03-08 Hitachi Ltd 情報処理装置
JPS6054070A (ja) * 1983-09-02 1985-03-28 Nec Corp 演算装置
US5093775A (en) * 1983-11-07 1992-03-03 Digital Equipment Corporation Microcode control system for digital data processing system
JPS60136872A (ja) * 1983-12-26 1985-07-20 Hitachi Ltd ベクトル処理装置
US4947316A (en) * 1983-12-29 1990-08-07 International Business Machines Corporation Internal bus architecture employing a simplified rapidly executable instruction set
US4562553A (en) * 1984-03-19 1985-12-31 Analogic Corporation Floating point arithmetic system and method with rounding anticipation
JPS6125245A (ja) * 1984-07-12 1986-02-04 Nec Corp 丸め処理回路
JPS6132139A (ja) * 1984-07-24 1986-02-14 Nec Corp 双方向バレルシフト回路
JPS61213927A (ja) * 1985-03-18 1986-09-22 Hitachi Ltd 浮動小数点演算処理装置
JPS6238937A (ja) * 1985-08-13 1987-02-19 Panafacom Ltd 浮動小数点演算における保護桁処理方式
US4763294A (en) * 1985-12-19 1988-08-09 Wang Laboratories, Inc. Method and apparatus for floating point operations
US4991080A (en) * 1986-03-13 1991-02-05 International Business Machines Corporation Pipeline processing apparatus for executing instructions in three streams, including branch stream pre-execution processor for pre-executing conditional branch instructions
US4827441A (en) * 1986-03-27 1989-05-02 Motorola, Inc. Barrel shifter
US4847802A (en) * 1986-06-12 1989-07-11 Advanced Micro Devices, Inc. Method and apparatus for identifying the precision of an operand in a multiprecision floating-point processor
US4845659A (en) * 1986-08-15 1989-07-04 International Business Machines Corporation Accelerated validity response permitting early issue of instructions dependent upon outcome of floating point operations
JP2617733B2 (ja) * 1986-09-09 1997-06-04 株式会社日立製作所 初等関数演算装置
JPH079643B2 (ja) * 1986-09-24 1995-02-01 株式会社日立マイコンシステム コプロセツサデ−タ転送制御方式
US5193159A (en) * 1986-09-24 1993-03-09 Hitachi, Ltd. Microprocessor system
US4811211A (en) * 1986-09-26 1989-03-07 Performance Semiconductor Corporation On-line overflow response system and ALU branching structure
JPS63157233A (ja) * 1986-12-20 1988-06-30 Fujitsu Ltd 浮動小数点演算装置
US5341482A (en) * 1987-03-20 1994-08-23 Digital Equipment Corporation Method for synchronization of arithmetic exceptions in central processing units having pipelined execution units simultaneously executing instructions
JPS648438A (en) * 1987-06-30 1989-01-12 Mitsubishi Electric Corp Data processor
US4864527A (en) * 1987-08-24 1989-09-05 Victor Peng Apparatus and method for using a single carry chain for leading one detection and for "sticky" bit calculation
US4876664A (en) * 1987-08-26 1989-10-24 Allen-Bradley Company, Inc. Programmable controller with a dual intermodule message system
US4858101A (en) * 1987-08-26 1989-08-15 Allen-Bradley Company, Inc. Programmable controller with parallel processors
US5193189A (en) * 1987-10-07 1993-03-09 Allen-Bradley Company, Inc. Programmable controller with multiple priority level task processing
US4937777A (en) * 1987-10-07 1990-06-26 Allen-Bradley Company, Inc. Programmable controller with multiple task processors
JPH0769783B2 (ja) * 1987-11-16 1995-07-31 日本電気株式会社 例外処理方式
US5101344A (en) * 1988-01-28 1992-03-31 Motorola, Inc. Data processor having split level control store
US5367649A (en) * 1988-05-20 1994-11-22 Waferscale Integration, Inc. Programmable controller
US5153848A (en) * 1988-06-17 1992-10-06 Bipolar Integrated Technology, Inc. Floating point processor with internal free-running clock
DE58909182D1 (de) * 1988-07-05 1995-05-24 Siemens Ag Netzwerk -Baustein und Architektur für die programmierbare Emulation künstlicher neuronaler Netze mit digitaler Arbeitsweise.
JPH0261723A (ja) * 1988-08-29 1990-03-01 Matsushita Electric Ind Co Ltd ステートマシン
US4928259A (en) * 1988-09-23 1990-05-22 Intel Corporation Sticky bit predictor for floating-point multiplication
US4901270A (en) * 1988-09-23 1990-02-13 Intel Corporation Four-to-two adder cell for parallel multiplication
US4931970A (en) * 1989-01-13 1990-06-05 International Business Machines Corporation Apparatus for determining if there is a loss of data during a shift operation
US5027308A (en) * 1989-02-14 1991-06-25 Intel Corporation Circuit for adding/subtracting two floating point operands
US5010508A (en) * 1989-02-14 1991-04-23 Intel Corporation Prenormalization for a floating-point adder
US5170475A (en) * 1989-03-06 1992-12-08 Motorola, Inc. Data processor having instructions for interpolating between memory-resident data values respectively
US5475631A (en) * 1989-03-09 1995-12-12 Micron Technology, Inc. Multiport RAM based multiprocessor
US5046038A (en) * 1989-07-07 1991-09-03 Cyrix Corporation Method and apparatus for performing division using a rectangular aspect ratio multiplier
US5307303A (en) * 1989-07-07 1994-04-26 Cyrix Corporation Method and apparatus for performing division using a rectangular aspect ratio multiplier
US5440749A (en) * 1989-08-03 1995-08-08 Nanotronics Corporation High performance, low cost microprocessor architecture
US5159566A (en) * 1989-09-05 1992-10-27 Cyrix Corporation Method and apparatus for performing the square root function using a rectangular aspect ratio multiplier
US5060182A (en) * 1989-09-05 1991-10-22 Cyrix Corporation Method and apparatus for performing the square root function using a rectangular aspect ratio multiplier
US5144576A (en) * 1989-09-05 1992-09-01 Cyrix Corporation Signed digit multiplier
US5042001A (en) * 1989-10-02 1991-08-20 Cyrix Corporation Method and apparatus for performing mathematical functions using polynomial approximation and a rectangular aspect ratio multiplier
EP0449408A3 (en) * 1990-03-28 1993-07-21 Advanced Micro Devices, Inc. System adaptable for managing data
US5412785A (en) * 1990-04-09 1995-05-02 Motorola, Inc. Microprogrammed data processor which includes a microsequencer in which a next microaddress output of a microROM is connected to the or-plane of an entry PLA
JP2556612B2 (ja) * 1990-08-29 1996-11-20 日本電気アイシーマイコンシステム株式会社 バレルシフタ回路
US5625836A (en) * 1990-11-13 1997-04-29 International Business Machines Corporation SIMD/MIMD processing memory element (PME)
US5828894A (en) * 1990-11-13 1998-10-27 International Business Machines Corporation Array processor having grouping of SIMD pickets
US5708836A (en) * 1990-11-13 1998-01-13 International Business Machines Corporation SIMD/MIMD inter-processor communication
US5794059A (en) * 1990-11-13 1998-08-11 International Business Machines Corporation N-dimensional modified hypercube
US5963746A (en) * 1990-11-13 1999-10-05 International Business Machines Corporation Fully distributed processing memory element
DE69131272T2 (de) * 1990-11-13 1999-12-09 International Business Machines Corp., Armonk Paralleles Assoziativprozessor-System
US5765015A (en) * 1990-11-13 1998-06-09 International Business Machines Corporation Slide network for an array processor
US5630162A (en) * 1990-11-13 1997-05-13 International Business Machines Corporation Array processor dotted communication network based on H-DOTs
US5966528A (en) * 1990-11-13 1999-10-12 International Business Machines Corporation SIMD/MIMD array processor with vector processing
US5809292A (en) * 1990-11-13 1998-09-15 International Business Machines Corporation Floating point for simid array machine
US5765011A (en) * 1990-11-13 1998-06-09 International Business Machines Corporation Parallel processing system having a synchronous SIMD processing with processing elements emulating SIMD operation using individual instruction streams
US5590345A (en) * 1990-11-13 1996-12-31 International Business Machines Corporation Advanced parallel array processor(APAP)
US5734921A (en) * 1990-11-13 1998-03-31 International Business Machines Corporation Advanced parallel array processor computer package
US5815723A (en) * 1990-11-13 1998-09-29 International Business Machines Corporation Picket autonomy on a SIMD machine
US5963745A (en) * 1990-11-13 1999-10-05 International Business Machines Corporation APAP I/O programmable router
US5765012A (en) * 1990-11-13 1998-06-09 International Business Machines Corporation Controller for a SIMD/MIMD array having an instruction sequencer utilizing a canned routine library
US5617577A (en) * 1990-11-13 1997-04-01 International Business Machines Corporation Advanced parallel array processor I/O connection
US5588152A (en) * 1990-11-13 1996-12-24 International Business Machines Corporation Advanced parallel processor including advanced support hardware
JPH04283831A (ja) * 1991-03-13 1992-10-08 Fujitsu Ltd 除算器
US5594918A (en) * 1991-05-13 1997-01-14 International Business Machines Corporation Parallel computer system providing multi-ported intelligent memory
US5278782A (en) * 1991-06-03 1994-01-11 Matsushita Electric Industrial Co., Ltd. Square root operation device
EP0530936B1 (en) * 1991-09-05 2000-05-17 Cyrix Corporation Method and apparatus for performing prescaled division
WO1993008525A2 (en) * 1991-10-24 1993-04-29 Intel Corporation Data processing system
US5361370A (en) * 1991-10-24 1994-11-01 Intel Corporation Single-instruction multiple-data processor having dual-ported local memory architecture for simultaneous data transmission on local memory ports and global port
US5594927A (en) * 1992-01-09 1997-01-14 Digital Equipment Corporation Apparatus and method for aligning data transferred via DMA using a barrel shifter and a buffer comprising of byte-wide, individually addressabe FIFO circuits
JP2642039B2 (ja) * 1992-05-22 1997-08-20 インターナショナル・ビジネス・マシーンズ・コーポレイション アレイ・プロセッサ
US5600584A (en) * 1992-09-15 1997-02-04 Schlafly; Roger Interactive formula compiler and range estimator
US5347481A (en) * 1993-02-01 1994-09-13 Hal Computer Systems, Inc. Method and apparatus for multiplying denormalized binary floating point numbers without additional delay
US5305248A (en) * 1993-04-23 1994-04-19 International Business Machines Corporation Fast IEEE double precision reciprocals and square roots
US5548544A (en) * 1994-10-14 1996-08-20 Ibm Corporation Method and apparatus for rounding the result of an arithmetic operation
US5511016A (en) * 1994-11-30 1996-04-23 International Business Machines Corporation Method for store rounding and circuit therefor
US5867722A (en) * 1995-04-25 1999-02-02 United Microelectronics Corporation Sticky bit detector for a floating-point processor
US5752071A (en) * 1995-07-17 1998-05-12 Intel Corporation Function coprocessor
US5768169A (en) * 1995-10-02 1998-06-16 Intel Corporation Method and apparatus for improved processing of numeric applications in the presence of subnormal numbers in a computer system
DE69628326D1 (de) * 1995-10-06 2003-06-26 Patriot Scient Corp Architektur für einen risc-mikroprozessor
US5812439A (en) * 1995-10-10 1998-09-22 Microunity Systems Engineering, Inc. Technique of incorporating floating point information into processor instructions
KR19980082906A (ko) * 1997-05-09 1998-12-05 김영환 부동 소수점 숫자의 정수형으로의 변환 방법
JP3029812B2 (ja) * 1997-06-03 2000-04-10 株式会社ジャストシステム 演算エラー復旧方法およびその装置，並びにその方法をコンピュータに実行させるためのプログラムを記録したコンピュータ読み取り可能な記録媒体
US6961846B1 (en) * 1997-09-12 2005-11-01 Infineon Technologies North America Corp. Data processing unit, microprocessor, and method for performing an instruction
US6578059B1 (en) * 1998-10-10 2003-06-10 Institute For The Development Of Emerging Architectures, L.L.C. Methods and apparatus for controlling exponent range in floating-point calculations
US6791564B1 (en) 2000-05-05 2004-09-14 Ipfirst, Llc Mechanism for clipping RGB value during integer transfer
WO2002013370A2 (en) * 2000-08-09 2002-02-14 Skybitz, Inc. Frequency translator using a cordic phase rotator
US7039906B1 (en) * 2000-09-29 2006-05-02 International Business Machines Corporation Compiler for enabling multiple signed independent data elements per register
FR2816181B1 (fr) 2000-11-07 2003-09-05 Oreal Recipient equipe d'un tube plongeur et d'un element d'application
FR2816285B1 (fr) 2000-11-07 2003-04-18 Oreal Dispositif de conditionnement comportant une unite amovible
US7139900B2 (en) 2003-06-23 2006-11-21 Intel Corporation Data packet arithmetic logic devices and methods
US7437593B2 (en) * 2003-07-14 2008-10-14 International Business Machines Corporation Apparatus, system, and method for managing errors in prefetched data
FR2867289A1 (fr) * 2004-03-02 2005-09-09 France Telecom Procede et dispositif pour accomplir une operation cryptographique
CN101615173B (zh) * 2006-02-06 2011-11-30 威盛电子股份有限公司 处理任何数个不同格式数据的串流处理器及其方法及模块
US8151160B1 (en) 2008-05-09 2012-04-03 Lsi Corporation Configurable low-density parity-check decoder for LDPC codes of arbitrary block size and method of configuring the same
US10127015B2 (en) * 2016-09-30 2018-11-13 International Business Machines Corporation Decimal multiply and shift instruction
US11675599B2 (en) * 2020-08-04 2023-06-13 Dell Products L.P. Systems and methods for managing system rollup of accelerator health
US12010231B2 (en) * 2021-06-23 2024-06-11 Pqsecure Technologies, Llc Computer processing architecture and method for supporting multiple public-key cryptosystems based on exponentiation

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3434114A (en) * 1966-09-23 1969-03-18 Ibm Variable floating point precision
US3594565A (en) * 1968-05-31 1971-07-20 Singer Co Round off apparatus for electronic calculators
US3603934A (en) * 1968-07-15 1971-09-07 Ibm Data processing system capable of operation despite a malfunction
GB1397438A (en) * 1971-10-27 1975-06-11 Ibm Data processing system
US3871578A (en) * 1972-10-10 1975-03-18 Digital Equipment Corp Data processing system for multiplying and intergerizing floating point numbers
JPS5098253A (en, 2012) * 1973-12-26 1975-08-05
JPS5278332A (en) * 1975-12-25 1977-07-01 Agency Of Ind Science & Technol Batch digit shifter
US4021655A (en) * 1976-03-30 1977-05-03 International Business Machines Corporation Oversized data detection hardware for data processors which store data at variable length destinations
JPS5386539A (en) * 1977-01-10 1978-07-31 Hitachi Ltd Arithmetic unit

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