JPH0122653B2 - - Google Patents
Info
- Publication number
- JPH0122653B2 JPH0122653B2 JP55177648A JP17764880A JPH0122653B2 JP H0122653 B2 JPH0122653 B2 JP H0122653B2 JP 55177648 A JP55177648 A JP 55177648A JP 17764880 A JP17764880 A JP 17764880A JP H0122653 B2 JPH0122653 B2 JP H0122653B2
- Authority
- JP
- Japan
- Prior art keywords
- address
- control device
- main storage
- storage device
- flip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000015654 memory Effects 0.000 claims description 29
- 238000012545 processing Methods 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 6
- 101150013204 MPS2 gene Proteins 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000003745 diagnosis Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000009977 dual effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0615—Address space extension
- G06F12/0623—Address space extension for memory modules
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Hardware Redundancy (AREA)
- Multi Processors (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55177648A JPS57101958A (en) | 1980-12-16 | 1980-12-16 | Memory address extension system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55177648A JPS57101958A (en) | 1980-12-16 | 1980-12-16 | Memory address extension system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57101958A JPS57101958A (en) | 1982-06-24 |
JPH0122653B2 true JPH0122653B2 (da) | 1989-04-27 |
Family
ID=16034660
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55177648A Granted JPS57101958A (en) | 1980-12-16 | 1980-12-16 | Memory address extension system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57101958A (da) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61243548A (ja) * | 1985-04-22 | 1986-10-29 | Nec Corp | デ−タ記憶装置 |
JPS62128094A (ja) * | 1985-11-28 | 1987-06-10 | Nec Ic Microcomput Syst Ltd | マイクロコンピユ−タ |
JP2886856B2 (ja) * | 1986-04-09 | 1999-04-26 | 株式会社日立製作所 | 二重化バス接続方式 |
JPS643769A (en) * | 1987-06-26 | 1989-01-09 | Nippon Telegraph & Telephone | Memory access system |
JP2638139B2 (ja) * | 1988-10-14 | 1997-08-06 | 三菱マテリアル株式会社 | 粉末成形における均一充填装置 |
JPH02199562A (ja) * | 1989-01-30 | 1990-08-07 | Oki Electric Ind Co Ltd | 二重化メモリコピー方式 |
JP5321782B2 (ja) * | 2008-01-22 | 2013-10-23 | 日本電気株式会社 | 二重化システム及びメモリコピー方法 |
-
1980
- 1980-12-16 JP JP55177648A patent/JPS57101958A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS57101958A (en) | 1982-06-24 |
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