JPH0121620B2 - - Google Patents

Info

Publication number
JPH0121620B2
JPH0121620B2 JP58028245A JP2824583A JPH0121620B2 JP H0121620 B2 JPH0121620 B2 JP H0121620B2 JP 58028245 A JP58028245 A JP 58028245A JP 2824583 A JP2824583 A JP 2824583A JP H0121620 B2 JPH0121620 B2 JP H0121620B2
Authority
JP
Japan
Prior art keywords
flip
chip integrated
integrated circuit
test
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58028245A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59154035A (ja
Inventor
Tetsuo Fujii
Toshio Sonobe
Michitaka Hayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
NipponDenso Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NipponDenso Co Ltd filed Critical NipponDenso Co Ltd
Priority to JP58028245A priority Critical patent/JPS59154035A/ja
Publication of JPS59154035A publication Critical patent/JPS59154035A/ja
Publication of JPH0121620B2 publication Critical patent/JPH0121620B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10P74/00—

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
JP58028245A 1983-02-22 1983-02-22 フリツプチツプ集積回路のテスト方法 Granted JPS59154035A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58028245A JPS59154035A (ja) 1983-02-22 1983-02-22 フリツプチツプ集積回路のテスト方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58028245A JPS59154035A (ja) 1983-02-22 1983-02-22 フリツプチツプ集積回路のテスト方法

Publications (2)

Publication Number Publication Date
JPS59154035A JPS59154035A (ja) 1984-09-03
JPH0121620B2 true JPH0121620B2 (enExample) 1989-04-21

Family

ID=12243193

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58028245A Granted JPS59154035A (ja) 1983-02-22 1983-02-22 フリツプチツプ集積回路のテスト方法

Country Status (1)

Country Link
JP (1) JPS59154035A (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3817600C2 (de) * 1987-05-26 1994-06-23 Matsushita Electric Works Ltd Verfahren zur Herstellung einer Halbleitervorrichtung mit einem keramischen Substrat und einem integrierten Schaltungskreis
JPS6481333A (en) * 1987-09-24 1989-03-27 Hitachi Ltd Test board for flip-chip
JPH0563029A (ja) * 1991-09-02 1993-03-12 Fujitsu Ltd 半導体素子
US5206585A (en) * 1991-12-02 1993-04-27 At&T Bell Laboratories Methods for testing integrated circuit devices
US5971253A (en) 1995-07-31 1999-10-26 Tessera, Inc. Microelectronic component mounting with deformable shell terminals
DE59611449D1 (de) 1995-09-08 2007-12-20 Fraunhofer Ges Forschung Verfahren und vorrichtung zum testen eines chips
US6635514B1 (en) 1996-12-12 2003-10-21 Tessera, Inc. Compliant package with conductive elastomeric posts
DE69915299T2 (de) 1998-07-15 2005-02-24 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Methode um lötzinn auf eine anordnung zu übertragen und/oder die anordnung zu testen
US7159292B2 (en) 2002-05-27 2007-01-09 Yamaichi Electronics Co., Ltd. Recovery processing method of an electrode
JP2007259833A (ja) * 2006-03-30 2007-10-11 Tachikawa Heiwa Nouen:Kk 木製植木鉢

Also Published As

Publication number Publication date
JPS59154035A (ja) 1984-09-03

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