JP7684320B2 - 自由構成可能なパワー半導体モジュール - Google Patents

自由構成可能なパワー半導体モジュール Download PDF

Info

Publication number
JP7684320B2
JP7684320B2 JP2022546497A JP2022546497A JP7684320B2 JP 7684320 B2 JP7684320 B2 JP 7684320B2 JP 2022546497 A JP2022546497 A JP 2022546497A JP 2022546497 A JP2022546497 A JP 2022546497A JP 7684320 B2 JP7684320 B2 JP 7684320B2
Authority
JP
Japan
Prior art keywords
semiconductor
board
power
terminal
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2022546497A
Other languages
English (en)
Japanese (ja)
Other versions
JP2023512274A (ja
JP2023512274A5 (enExample
Inventor
シュダーラー，ユルゲン
キチン，スラボ
モーン，ファビアン
リーデル，ゲーアノート
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Energy Ltd
Original Assignee
Hitachi Energy Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Energy Ltd filed Critical Hitachi Energy Ltd
Publication of JP2023512274A publication Critical patent/JP2023512274A/ja
Publication of JP2023512274A5 publication Critical patent/JP2023512274A5/ja
Application granted granted Critical
Publication of JP7684320B2 publication Critical patent/JP7684320B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/25—Arrangements for cooling characterised by their materials
    • H10W40/255—Arrangements for cooling characterised by their materials having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/479—Leadframes on or in insulating or insulated package substrates, interposers, or redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H10W70/614—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together the multiple chips being integrally enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/658—Shapes or dispositions of interconnections for devices provided for in groups H10D8/00 - H10D48/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/401—Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0254—High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
    • H05K1/0262—Arrangements for regulating voltages or for using plural voltages
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04—Assemblies of printed circuits
    • H05K2201/042—Stacked spaced PCBs; Planar parts of folded flexible circuits having mounted components in between or spaced from each other
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10151—Sensor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10166—Transistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10196—Variable component, e.g. variable resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/222—Completing of printed circuits by adding non-printed jumper connections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07331—Connecting techniques
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/926—Multiple bond pads having different sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Conversion In General (AREA)
  • Combinations Of Printed Boards (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2022546497A 2020-01-30 2021-01-28 自由構成可能なパワー半導体モジュール Active JP7684320B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP20154510.0 2020-01-30
EP20154510 2020-01-30
PCT/EP2021/052004 WO2021152021A1 (en) 2020-01-30 2021-01-28 Free configurable power semiconductor module

Publications (3)

Publication Number Publication Date
JP2023512274A JP2023512274A (ja) 2023-03-24
JP2023512274A5 JP2023512274A5 (enExample) 2024-01-26
JP7684320B2 true JP7684320B2 (ja) 2025-05-27

Family

ID=69423064

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2022546497A Active JP7684320B2 (ja) 2020-01-30 2021-01-28 自由構成可能なパワー半導体モジュール

Country Status (5)

Country Link
US (1) US12599012B2 (enExample)
EP (1) EP4097761B1 (enExample)
JP (1) JP7684320B2 (enExample)
CN (1) CN115039222B (enExample)
WO (1) WO2021152021A1 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102021208772B4 (de) 2021-08-11 2024-05-16 Zf Friedrichshafen Ag Halbbrücke für einen Inverter zum Betreiben eines Elektrofahrzeugantriebs, Leistungsmodul umfassend mehrere Halbbrücken, Inverter, Verfahren zum Herstellen eines Inverters
DE102021208767A1 (de) 2021-08-11 2023-02-16 Zf Friedrichshafen Ag Halbbrücke für einen Inverter zum Betreiben eines Elektrofahrzeugantriebs, Leistungsmodul umfassend mehrere Halbbrücken, Inverter, Verfahren zum Herstellen eines Inverters
DE102021208770A1 (de) 2021-08-11 2023-02-16 Zf Friedrichshafen Ag Halbbrücke für einen Inverter zum Betreiben eines Elektrofahrzeugantriebs, Leistungsmodul umfassend mehrere Halbbrücken, Inverter, Verfahren zum Herstellen eines Inverters
DE102022209564A1 (de) 2022-09-13 2023-07-06 Zf Friedrichshafen Ag Leistungsmodul und verfahren zum montieren eines leistungsmoduls
DE102022211926A1 (de) * 2022-11-10 2024-05-16 D + L Dubois + Linke Gesellschaft mit beschränkter Haftung Schweißgerät
DE102022213006A1 (de) * 2022-12-02 2024-06-13 Zf Friedrichshafen Ag Leistungsmodul für einen Wandler mit separater Leiterplatte zur Steuersignalführung
CN119181675A (zh) * 2023-06-21 2024-12-24 北京大学 半导体封装结构
US12556090B2 (en) * 2023-07-18 2026-02-17 Volkswagen Aktiengesellschaft Wide band gap (WBG) devices based three-level neutral point clamped (NPC) power module designs
US20250294697A1 (en) * 2024-03-18 2025-09-18 Mahle International Gmbh Electric power converter
DE102024127473A1 (de) * 2024-09-23 2026-03-26 Infineon Technologies Ag Halbleitervorrichtungen und Verfahren zu deren Herstellung
CN120769416B (zh) * 2025-09-03 2026-01-02 乐山希尔电子股份有限公司 一种层叠式功率模块及制备方法
CN121215647A (zh) * 2025-11-27 2025-12-26 华侨大学 一种三相低压mosfet封装集成功率模块

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005243713A (ja) 2004-02-24 2005-09-08 Toshiba Corp パワーモジュール及び実装基板
JP2011114039A (ja) 2009-11-24 2011-06-09 Ibiden Co Ltd 半導体装置及びその製造方法
JP2018073923A (ja) 2016-10-27 2018-05-10 三菱電機株式会社 電力用半導体装置、電力用半導体装置の製造方法および電力変換装置
JP2018531576A (ja) 2015-10-20 2018-10-25 クリー ファイエットヴィル インコーポレイテッド 高電圧電力モジュール
JP2019096508A (ja) 2017-11-24 2019-06-20 川崎重工業株式会社 筐体

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8124429B2 (en) * 2006-12-15 2012-02-28 Richard Norman Reprogrammable circuit board with alignment-insensitive support for multiple component contact types
DE102008033410B4 (de) * 2008-07-16 2011-06-30 SEMIKRON Elektronik GmbH & Co. KG, 90431 Leistungselektronische Verbindungseinrichtung mit einem Leistungshalbleiterbauelement und Herstellungsverfahren hierzu
DE102009046258B3 (de) 2009-10-30 2011-07-07 Infineon Technologies AG, 85579 Leistungshalbleitermodul und Verfahren zum Betrieb eines Leistungshalbleitermoduls
CN102664177B (zh) * 2012-05-16 2014-10-29 中国科学院电工研究所 一种双面冷却的功率半导体模块
WO2014185050A1 (ja) 2013-05-16 2014-11-20 富士電機株式会社 半導体装置
EP2871765A1 (en) 2013-11-08 2015-05-13 Vincotech GmbH NPC converter for use in power module, and power module incorporating same
WO2015159751A1 (ja) 2014-04-14 2015-10-22 富士電機株式会社 半導体装置
JP6701641B2 (ja) 2015-08-13 2020-05-27 富士電機株式会社 半導体モジュール
EP3555914B1 (en) 2016-12-16 2021-02-03 ABB Schweiz AG Power semiconductor module with low gate path inductance
CN106887955A (zh) * 2017-04-17 2017-06-23 中车青岛四方车辆研究所有限公司 高压大功率dc/dc模块
WO2021151949A1 (en) 2020-01-30 2021-08-05 Abb Power Grids Switzerland Ag Power semiconductor module with accessible metal clips

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005243713A (ja) 2004-02-24 2005-09-08 Toshiba Corp パワーモジュール及び実装基板
JP2011114039A (ja) 2009-11-24 2011-06-09 Ibiden Co Ltd 半導体装置及びその製造方法
JP2018531576A (ja) 2015-10-20 2018-10-25 クリー ファイエットヴィル インコーポレイテッド 高電圧電力モジュール
JP2018073923A (ja) 2016-10-27 2018-05-10 三菱電機株式会社 電力用半導体装置、電力用半導体装置の製造方法および電力変換装置
JP2019096508A (ja) 2017-11-24 2019-06-20 川崎重工業株式会社 筐体

Also Published As

Publication number Publication date
CN115039222B (zh) 2024-10-11
WO2021152021A1 (en) 2021-08-05
JP2023512274A (ja) 2023-03-24
US12599012B2 (en) 2026-04-07
US20230116118A1 (en) 2023-04-13
EP4097761B1 (en) 2024-06-26
CN115039222A (zh) 2022-09-09
EP4097761A1 (en) 2022-12-07

Similar Documents

Publication Publication Date Title
JP7684320B2 (ja) 自由構成可能なパワー半導体モジュール
JP7162013B2 (ja) Ｄｃ端子の同軸配列を有するハーフブリッジモジュール
US10636732B2 (en) Power module based on multi-layer circuit board
US9147585B2 (en) Method for fabricating a plurality of semiconductor devices
US9147649B2 (en) Multi-chip module
JP2909704B2 (ja) 誘電体テープから形成されたディスクリートなチップキャリアを有する垂直なｉｃチップ積層体
US6885096B2 (en) Semiconductor device having at least three power terminals superposed on each other
EP0546731B1 (en) Internal wiring structure of a semiconductor device
US7829989B2 (en) Vertical packaged IC device modules with interconnected 3D laminates directly contacts wafer backside
US9275930B2 (en) Circuit device and method of manufacturing the same
US8450837B2 (en) Circuit device having an improved heat dissipitation, and the method of manufacturing the same
US20140070329A1 (en) Wireless module with active and passive components
KR20120123254A (ko) 전력 공급 모듈 및 이의 패키징 및 집적 방법
CN104517952B (zh) 功率半导体模块和用于制造功率半导体模块的方法
US7466020B2 (en) Power module
KR20100072055A (ko) 부회로들로 구성되는 전자 회로 및 그 제조 방법
US10170401B2 (en) Integrated power module
US9490199B2 (en) Interposer with programmable matrix for realizing configurable vertical semiconductor package arrangements
CN113140530A (zh) 包括连接到流体热沉的半导体封装的电子模块
CN119678253A (zh) 用于功率封装件的积层基板
CN117438403A (zh) 半导体封装和制造用于直立安装的半导体封装的方法
JPH0451488Y2 (enExample)

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20240118

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20240118

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A712

Effective date: 20240130

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20240205

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20240301

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20241212

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20250107

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20250401

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20250422

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20250515

R150 Certificate of patent or registration of utility model

Ref document number: 7684320

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150