JP7563986B2 - 埋め込みパッケージにおける応力緩衝層 - Google Patents

埋め込みパッケージにおける応力緩衝層 Download PDF

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JP7563986B2
JP7563986B2 JP2020569781A JP2020569781A JP7563986B2 JP 7563986 B2 JP7563986 B2 JP 7563986B2 JP 2020569781 A JP2020569781 A JP 2020569781A JP 2020569781 A JP2020569781 A JP 2020569781A JP 7563986 B2 JP7563986 B2 JP 7563986B2
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package
die
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conductive
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JP2021528845A (ja
JPWO2019241610A5 (https=
JP2021528845A5 (https=
Inventor
キム ウーチャン
政光 松浦
睦 升本
健吾 青屋
タンハ ニューイェン ハウ
キショアチャンド アローラ ヴィヴェク
ポダール アニンダヤ
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テキサス インスツルメンツ インコーポレイテッド
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
    • H10W40/226—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area
    • H10W40/228—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area the projecting parts being wire-shaped or pin-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/121—Arrangements for protection of devices protecting against mechanical damage
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/02—Manufacture or treatment of conductive package substrates serving as an interconnection, e.g. of metal plates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/25—Arrangements for cooling characterised by their materials
    • H10W40/258—Metallic materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H10W70/614—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together the multiple chips being integrally enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/10—Configurations of laterally-adjacent chips

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
JP2020569781A 2018-06-14 2019-06-14 埋め込みパッケージにおける応力緩衝層 Active JP7563986B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US16/008,119 US10580715B2 (en) 2018-06-14 2018-06-14 Stress buffer layer in embedded package
US16/008,119 2018-06-14
PCT/US2019/037149 WO2019241610A1 (en) 2018-06-14 2019-06-14 Stress buffer layer in embedded package

Publications (4)

Publication Number Publication Date
JP2021528845A JP2021528845A (ja) 2021-10-21
JPWO2019241610A5 JPWO2019241610A5 (https=) 2022-06-21
JP2021528845A5 JP2021528845A5 (https=) 2022-06-21
JP7563986B2 true JP7563986B2 (ja) 2024-10-08

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JP2020569781A Active JP7563986B2 (ja) 2018-06-14 2019-06-14 埋め込みパッケージにおける応力緩衝層

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US (2) US10580715B2 (https=)
EP (1) EP3807923A4 (https=)
JP (1) JP7563986B2 (https=)
CN (1) CN112074934B (https=)
WO (1) WO2019241610A1 (https=)

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* Cited by examiner, † Cited by third party
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US10580715B2 (en) * 2018-06-14 2020-03-03 Texas Instruments Incorporated Stress buffer layer in embedded package
TWI734545B (zh) * 2020-07-03 2021-07-21 財團法人工業技術研究院 半導體封裝結構
CN114093840A (zh) * 2021-10-27 2022-02-25 珠海越亚半导体股份有限公司 信热分离tmv封装结构及其制作方法
CN114678335B (zh) * 2022-05-27 2022-08-16 合肥矽迈微电子科技有限公司 一种芯片散热结构、工艺及半导体器件
KR102684858B1 (ko) * 2023-03-03 2024-07-17 제엠제코(주) 열방출 포스트 접합 반도체 패키지 및 이의 제조방법
US20250112107A1 (en) * 2023-09-28 2025-04-03 Stmicroelectronics International N.V. Heat sink, slug, or spreader and method of manufacturing the same

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US20120032350A1 (en) 2010-08-06 2012-02-09 Conexant Systems, Inc. Systems and Methods for Heat Dissipation Using Thermal Conduits

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JPH0997930A (ja) * 1995-07-27 1997-04-08 Aisin Seiki Co Ltd 熱電冷却モジュール及びその製造方法
JP2001217340A (ja) * 2000-02-01 2001-08-10 Nec Corp 半導体装置及びその製造方法
US8350384B2 (en) * 2009-11-24 2013-01-08 Stats Chippac, Ltd. Semiconductor device and method of forming electrical interconnect with stress relief void
US7299639B2 (en) * 2004-06-22 2007-11-27 Intel Corporation Thermoelectric module
US7355289B2 (en) * 2005-07-29 2008-04-08 Freescale Semiconductor, Inc. Packaged integrated circuit with enhanced thermal dissipation
US7855397B2 (en) * 2007-09-14 2010-12-21 Nextreme Thermal Solutions, Inc. Electronic assemblies providing active side heat pumping
US8008125B2 (en) * 2009-03-06 2011-08-30 General Electric Company System and method for stacked die embedded chip build-up
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US8241955B2 (en) * 2009-06-19 2012-08-14 Stats Chippac Ltd. Integrated circuit packaging system with mountable inward and outward interconnects and method of manufacture thereof
KR101698932B1 (ko) * 2010-08-17 2017-01-23 삼성전자 주식회사 반도체 패키지 및 그 제조방법
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JP2001298131A (ja) 2000-03-13 2001-10-26 Internatl Business Mach Corp <Ibm> 効率のよい熱伝達のための内部構造を備えたチップ・パッケージ
US20120032350A1 (en) 2010-08-06 2012-02-09 Conexant Systems, Inc. Systems and Methods for Heat Dissipation Using Thermal Conduits

Also Published As

Publication number Publication date
JP2021528845A (ja) 2021-10-21
CN112074934A (zh) 2020-12-11
US10580715B2 (en) 2020-03-03
US11183441B2 (en) 2021-11-23
US20190385924A1 (en) 2019-12-19
EP3807923A1 (en) 2021-04-21
EP3807923A4 (en) 2021-08-11
WO2019241610A1 (en) 2019-12-19
CN112074934B (zh) 2025-03-07
US20200203249A1 (en) 2020-06-25

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