JP7469201B2 - 半導体装置とその製造方法 - Google Patents
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Description
次に、比較例の製造方法について説明する。比較例の製造方法では、図8に示すように、第2半導体層22に相当する半導体基板60を準備し、その半導体基板上にエピタキシャル成長(例えば、CVD)によって、半導体基板60よりもドナー濃度が低いドリフト層26を形成する。この製造方法で半導体装置を製造すると、第2半導体層22及びドリフト層26内において、ドナー濃度と電気的アクティブドナー濃度の分布が略一致する。このため、第2半導体層22とドリフト層26の界面23xにおいて、電気的アクティブドナー濃度だけでなくドナー濃度も急峻に変化する。このため、第2半導体層22とドリフト層26の間で格子定数の差が大きく、界面23xに高い応力が加わる。また、エピタキシャル成長によりドリフト層26を形成する場合には、ドリフト層26と第2半導体層22の間でドナーの相互拡散が生じ難い。このため、ドリフト層26と第2半導体層22の界面23xにおいてドナー濃度の変化率が極めて高くなる。その結果、ドリフト層26と第2半導体層22の間の遷移層24の厚みが極めて薄くなる(図8では、遷移層24の厚みは略ゼロである。)。このため、界面23xに応力がより加わり易い。また、エピタキシャル成長によりドリフト層26を形成する場合には、ドリフト層26と第2半導体層22との間の結晶の連続性がそれほど高くないので、界面23xの強度がそれほど高くない。このように強度が低い界面23xに高い応力が加わるため、比較例の製造方法では界面23xにクラックが生じ易い。上述した実施例1~3の製造方法によれば、第1半導体層21と第2半導体層22の間でドナー濃度に差が生じ難い。また、実施例1~3の製造方法によれば、厚い遷移層24を形成することができる。また、実施例1~3の製造方法では、第2半導体層22からドリフト層26までが連続して形成されたバルク状の半導体であるので、界面23の強度が高い。したがって、実施例1~3の製造方法によれば、比較例の製造方法よりも、界面23におけるクラックの発生を抑制することができる。
Claims (3)
- 半導体装置であって、
酸化ガリウム系半導体によって構成されているn型の第1半導体層と、
酸化ガリウム系半導体によって構成されており、前記第1半導体層に接しており、前記第1半導体層の電気的アクティブドナー濃度よりも高い電気的アクティブドナー濃度を有するn型の第2半導体層、
を有し、
前記第1半導体層のドナー濃度と前記第2半導体層のドナー濃度との差が、前記第1半導体層の前記電気的アクティブドナー濃度と前記第2半導体層の前記電気的アクティブドナー濃度の差よりも小さく、
前記第1半導体層が、
前記第2半導体層に接している遷移層と、
前記遷移層に接しており、前記遷移層によって前記第2半導体層から分離されているドリフト層、
を有しており、
前記第2半導体層の前記電気的アクティブドナー濃度が、1×10 18 /cm 3 以上であり、
前記遷移層の電気的アクティブドナー濃度が、1×10 18 /cm 3 未満であり、
前記ドリフト層の電気的アクティブドナー濃度が、前記遷移層の前記電気的アクティブドナー濃度未満であり、
前記遷移層内の前記電気的アクティブドナー濃度が、前記第2半導体層から前記ドリフト層に向かうにしたがって低下するように分布しており、
前記第2半導体層と前記遷移層と前記ドリフト層の積層方向において、前記遷移層内の前記電気的アクティブドナー濃度の変化率が1μmあたり1×10 15 /cm 3 以上であり、
前記積層方向において、前記ドリフト層内の前記電気的アクティブドナー濃度の変化率が1μmあたり1×10 15 /cm 3 未満であり、
前記遷移層の厚さが、0.1μm以上である、
半導体装置。 - 半導体装置の製造方法であって、
酸化ガリウム系半導体によって構成されているn型の半導体基板をアニールすることによって前記半導体基板内の一部の領域の電気的アクティブドナー濃度を低下させる工程であって、前記半導体基板内に、前記電気的アクティブドナー濃度が低下した前記領域によって構成される第1半導体層と、前記第1半導体層よりも電気的アクティブドナー濃度が高いとともに前記第1半導体層に接する第2半導体層が形成される工程、
を有し、
前記半導体基板をアニールする前記工程が、
前記半導体基板に酸素イオンを注入する工程と、
前記酸素イオンを注入する前記工程の後に、前記半導体基板をアニールする工程、
を有する、製造方法。 - 半導体装置の製造方法であって、
酸化ガリウム系半導体によって構成されているn型の半導体基板をアニールすることによって前記半導体基板内の一部の領域の電気的アクティブドナー濃度を低下させる工程であって、前記半導体基板内に、前記電気的アクティブドナー濃度が低下した前記領域によって構成される第1半導体層と、前記第1半導体層よりも電気的アクティブドナー濃度が高いとともに前記第1半導体層に接する第2半導体層が形成される工程、
を有し、
前記半導体基板をアニールする前記工程が、
H、Li、Be、N、Na、Mg、P、S、K、Ca、Cr、Mn、Fe、Co、Ni、Cu、Zn、As、Se、Rb、Sr、Ru、Rh、Pd、Ag、Cd、Sb、Te、Cs、Ba、Ir、Pt、Au、Hg、Tl、Pb、Bi、Po、Fr、Raからなる群から選択される少なくとも1種のイオンを前記半導体基板に注入する工程と、
前記少なくとも1種のイオンを前記半導体基板に注入する前記工程の後に、前記半導体基板をアニールする工程、
を有する、製造方法。
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