JP7267394B2 - 半導体素子の製造方法および半導体素子体 - Google Patents
半導体素子の製造方法および半導体素子体 Download PDFInfo
- Publication number
- JP7267394B2 JP7267394B2 JP2021502652A JP2021502652A JP7267394B2 JP 7267394 B2 JP7267394 B2 JP 7267394B2 JP 2021502652 A JP2021502652 A JP 2021502652A JP 2021502652 A JP2021502652 A JP 2021502652A JP 7267394 B2 JP7267394 B2 JP 7267394B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- substrate
- support substrate
- semiconductor device
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
- H10P95/11—Separation of active layers from substrates
- H10P95/112—Separation of active layers from substrates leaving a reusable substrate, e.g. epitaxial lift off
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P54/00—Cutting or separating of wafers, substrates or parts of devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
- H10H20/018—Bonding of wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
- H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
- H10H20/0133—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials
- H10H20/01335—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials the light-emitting regions comprising nitride materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
- H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
- H10H20/0137—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials the light-emitting regions comprising nitride materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/032—Manufacture or treatment of electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/83—Electrodes
- H10H20/832—Electrodes characterised by their material
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/27—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials
- H10P14/276—Lateral overgrowth
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
- H10P14/2901—Materials
- H10P14/2902—Materials being Group IVA materials
- H10P14/2905—Silicon, silicon germanium or germanium
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
- H10P14/2901—Materials
- H10P14/2907—Materials being Group IIIA-VA materials
- H10P14/2908—Nitrides
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
- H10P14/2926—Crystal orientations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/019—Manufacture or treatment of bond pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/019—Manufacture or treatment of bond pads
- H10W72/01951—Changing the shapes of bond pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/019—Manufacture or treatment of bond pads
- H10W72/01951—Changing the shapes of bond pads
- H10W72/01955—Changing the shapes of bond pads by using masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07231—Techniques
- H10W72/07236—Soldering or alloying
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/921—Structures or relative sizes of bond pads
- H10W72/923—Bond pads having multiple stacked layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/931—Shapes of bond pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
- H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W80/00—Direct bonding of chips, wafers or substrates
- H10W80/701—Direct bonding of chips, wafers or substrates characterised by the pads after the direct bonding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/791—Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads
- H10W90/792—Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads between multiple chips
Landscapes
- Led Devices (AREA)
- Recrystallisation Techniques (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2019036097 | 2019-02-28 | ||
| JP2019036097 | 2019-02-28 | ||
| PCT/JP2020/008399 WO2020175684A1 (ja) | 2019-02-28 | 2020-02-28 | 半導体素子の製造方法および半導体素子体 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPWO2020175684A1 JPWO2020175684A1 (https=) | 2020-09-03 |
| JPWO2020175684A5 JPWO2020175684A5 (https=) | 2022-07-28 |
| JP7267394B2 true JP7267394B2 (ja) | 2023-05-01 |
Family
ID=72239807
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2021502652A Active JP7267394B2 (ja) | 2019-02-28 | 2020-02-28 | 半導体素子の製造方法および半導体素子体 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US12132142B2 (https=) |
| EP (1) | EP3933886B1 (https=) |
| JP (1) | JP7267394B2 (https=) |
| CN (2) | CN113490995B (https=) |
| WO (1) | WO2020175684A1 (https=) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7854514B2 (ja) * | 2022-12-05 | 2026-05-01 | 京セラ株式会社 | 半導体素子の製造方法および製造装置 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007096114A (ja) | 2005-09-29 | 2007-04-12 | Sanyo Electric Co Ltd | 半導体発光素子及び半導体発光素子の製造方法 |
| JP2011066390A (ja) | 2009-08-20 | 2011-03-31 | Pawdec:Kk | 半導体素子の製造方法 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4638958B1 (https=) | 1962-03-20 | 1971-11-16 | ||
| JP4731180B2 (ja) * | 2005-02-21 | 2011-07-20 | 三洋電機株式会社 | 窒化物系半導体素子の製造方法 |
| JP5070247B2 (ja) * | 2009-06-23 | 2012-11-07 | 株式会社沖データ | 半導体装置の製造方法、及び半導体装置 |
| JP5466479B2 (ja) * | 2009-10-27 | 2014-04-09 | スタンレー電気株式会社 | 半導体素子の製造方法 |
| WO2015160909A1 (en) * | 2014-04-16 | 2015-10-22 | Yale University | Method of obtaining planar semipolar gallium nitride surfaces |
| US20230260943A1 (en) * | 2022-02-17 | 2023-08-17 | Micron Technology, Inc. | Semiconductor die assemblies with flexible interconnects and associated methods and systems |
-
2020
- 2020-02-28 CN CN202080016757.3A patent/CN113490995B/zh active Active
- 2020-02-28 CN CN202510136611.7A patent/CN120015705A/zh active Pending
- 2020-02-28 JP JP2021502652A patent/JP7267394B2/ja active Active
- 2020-02-28 US US17/434,253 patent/US12132142B2/en active Active
- 2020-02-28 EP EP20762528.6A patent/EP3933886B1/en active Active
- 2020-02-28 WO PCT/JP2020/008399 patent/WO2020175684A1/ja not_active Ceased
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007096114A (ja) | 2005-09-29 | 2007-04-12 | Sanyo Electric Co Ltd | 半導体発光素子及び半導体発光素子の製造方法 |
| JP2011066390A (ja) | 2009-08-20 | 2011-03-31 | Pawdec:Kk | 半導体素子の製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2020175684A1 (ja) | 2020-09-03 |
| US20220140179A1 (en) | 2022-05-05 |
| CN113490995B (zh) | 2025-02-25 |
| CN113490995A (zh) | 2021-10-08 |
| EP3933886A1 (en) | 2022-01-05 |
| JPWO2020175684A1 (https=) | 2020-09-03 |
| CN120015705A (zh) | 2025-05-16 |
| US12132142B2 (en) | 2024-10-29 |
| EP3933886B1 (en) | 2026-03-18 |
| EP3933886A4 (en) | 2022-09-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2022185100A (ja) | 劈開技法を用いて基板を除去する方法 | |
| JP7314269B2 (ja) | 積層体および積層体の製造方法 | |
| JP7158745B2 (ja) | 基板を除去する方法 | |
| US8105852B2 (en) | Method of forming a composite substrate and growing a III-V light emitting device over the composite substrate | |
| JP7343607B2 (ja) | 半導体素子および半導体素子の製造方法 | |
| JP2019134101A (ja) | 半導体素子の製造方法 | |
| JP4333466B2 (ja) | 半導体基板の製造方法及び自立基板の製造方法 | |
| JP4866935B2 (ja) | 立方晶炭化ケイ素単結晶薄膜の製造方法及び半導体装置 | |
| JP7267394B2 (ja) | 半導体素子の製造方法および半導体素子体 | |
| JP7660615B2 (ja) | 半導体デバイスの製造方法および半導体デバイス並びにテンプレート基板 | |
| JP7779906B2 (ja) | 半導体基板並びにその製造方法および製造装置、GaN系結晶体、半導体デバイス、電子機器 | |
| JPH07122520A (ja) | 窒化ガリウム系化合物半導体チップの製造方法 | |
| JP7221302B2 (ja) | 半導体素子の製造方法、半導体素子および半導体デバイス | |
| JP4534356B2 (ja) | 窒化物半導体層の製造方法および窒化物半導体基板の製造方法ならびに窒化物半導体基板製造用基体 | |
| JP7828879B2 (ja) | 半導体基板およびその製造方法 | |
| JP2022058690A (ja) | 複数の半導体素子の製造方法 | |
| JPWO2023153358A5 (https=) | ||
| CN117374171A (zh) | 半导体结构的制作方法 | |
| JP2001156400A (ja) | 化合物半導体基板の形成方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20210825 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20220719 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20221004 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20221205 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20230328 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20230419 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 7267394 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |