CN113490995B - 半导体元件的制造方法 - Google Patents

半导体元件的制造方法 Download PDF

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Publication number
CN113490995B
CN113490995B CN202080016757.3A CN202080016757A CN113490995B CN 113490995 B CN113490995 B CN 113490995B CN 202080016757 A CN202080016757 A CN 202080016757A CN 113490995 B CN113490995 B CN 113490995B
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semiconductor element
support substrate
substrate
base substrate
layer
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CN113490995A (zh
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正木克明
村川贤太郎
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Kyocera Corp
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Kyocera Corp
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/11—Separation of active layers from substrates
    • H10P95/112—Separation of active layers from substrates leaving a reusable substrate, e.g. epitaxial lift off
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    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
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    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
    • H10H20/0133—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials
    • H10H20/01335—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials the light-emitting regions comprising nitride materials
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    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
    • H10H20/0137—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials the light-emitting regions comprising nitride materials
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    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
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    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/83—Electrodes
    • H10H20/832—Electrodes characterised by their material
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    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/27—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials
    • H10P14/276—Lateral overgrowth
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    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
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    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2907—Materials being Group IIIA-VA materials
    • H10P14/2908—Nitrides
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    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2926—Crystal orientations
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H10W72/01951—Changing the shapes of bond pads
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H10W72/01951—Changing the shapes of bond pads
    • H10W72/01955—Changing the shapes of bond pads by using masks
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
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    • H10W72/931—Shapes of bond pads
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W80/00—Direct bonding of chips, wafers or substrates
    • H10W80/701—Direct bonding of chips, wafers or substrates characterised by the pads after the direct bonding
    • H—ELECTRICITY
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/791—Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads
    • H10W90/792—Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads between multiple chips

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  • Recrystallisation Techniques (AREA)
CN202080016757.3A 2019-02-28 2020-02-28 半导体元件的制造方法 Active CN113490995B (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202510136611.7A CN120015705A (zh) 2019-02-28 2020-02-28 半导体基板

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2019-036097 2019-02-28
JP2019036097 2019-02-28
PCT/JP2020/008399 WO2020175684A1 (ja) 2019-02-28 2020-02-28 半導体素子の製造方法および半導体素子体

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CN202510136611.7A Division CN120015705A (zh) 2019-02-28 2020-02-28 半导体基板

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CN113490995A CN113490995A (zh) 2021-10-08
CN113490995B true CN113490995B (zh) 2025-02-25

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CN202510136611.7A Pending CN120015705A (zh) 2019-02-28 2020-02-28 半导体基板

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US (1) US12132142B2 (https=)
EP (1) EP3933886B1 (https=)
JP (1) JP7267394B2 (https=)
CN (2) CN113490995B (https=)
WO (1) WO2020175684A1 (https=)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7854514B2 (ja) * 2022-12-05 2026-05-01 京セラ株式会社 半導体素子の製造方法および製造装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007096114A (ja) * 2005-09-29 2007-04-12 Sanyo Electric Co Ltd 半導体発光素子及び半導体発光素子の製造方法
JP4638958B1 (ja) * 2009-08-20 2011-02-23 株式会社パウデック 半導体素子の製造方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4638958B1 (https=) 1962-03-20 1971-11-16
JP4731180B2 (ja) * 2005-02-21 2011-07-20 三洋電機株式会社 窒化物系半導体素子の製造方法
JP5070247B2 (ja) * 2009-06-23 2012-11-07 株式会社沖データ 半導体装置の製造方法、及び半導体装置
JP5466479B2 (ja) * 2009-10-27 2014-04-09 スタンレー電気株式会社 半導体素子の製造方法
WO2015160909A1 (en) * 2014-04-16 2015-10-22 Yale University Method of obtaining planar semipolar gallium nitride surfaces
US20230260943A1 (en) * 2022-02-17 2023-08-17 Micron Technology, Inc. Semiconductor die assemblies with flexible interconnects and associated methods and systems

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007096114A (ja) * 2005-09-29 2007-04-12 Sanyo Electric Co Ltd 半導体発光素子及び半導体発光素子の製造方法
JP4638958B1 (ja) * 2009-08-20 2011-02-23 株式会社パウデック 半導体素子の製造方法

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WO2020175684A1 (ja) 2020-09-03
JP7267394B2 (ja) 2023-05-01
US20220140179A1 (en) 2022-05-05
CN113490995A (zh) 2021-10-08
EP3933886A1 (en) 2022-01-05
JPWO2020175684A1 (https=) 2020-09-03
CN120015705A (zh) 2025-05-16
US12132142B2 (en) 2024-10-29
EP3933886B1 (en) 2026-03-18
EP3933886A4 (en) 2022-09-28

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