JP7257463B2 - 埋め込み構造およびその作製方法ならびに基板 - Google Patents
埋め込み構造およびその作製方法ならびに基板 Download PDFInfo
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- JP7257463B2 JP7257463B2 JP2021127727A JP2021127727A JP7257463B2 JP 7257463 B2 JP7257463 B2 JP 7257463B2 JP 2021127727 A JP2021127727 A JP 2021127727A JP 2021127727 A JP2021127727 A JP 2021127727A JP 7257463 B2 JP7257463 B2 JP 7257463B2
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Description
仮支持プレートを用意し、前記仮支持プレートの上下面の少なくとも一面に第2回路層を作製し、前記第2回路層を覆って第1誘電体層を作製するステップと、
前記第1誘電体層をパターン画像化処理して硬化させ、キャビティを形成し、前記キャビティ内にデバイスを実装して熱硬化させ、前記デバイスの端子が設置された面を前記キャビティの開口側に向けるステップと、
前記第2誘電体層を作製するステップであって、前記デバイスが前記第2誘電体層内に埋め込まれ、かつ前記第2誘電体層の表面が前記端子の表面より設定値だけ高いステップと、
前記第2誘電体層の表面に、前記端子に直接接続される第1回路層を作製し、かつ前記第2誘電体層を貫通して金属柱を作製するステップであって、前記第1回路層は前記金属柱を介して前記第2回路層に接続されるステップと、
前記仮支持プレートを分割して、第1段階埋め込み構造体を形成するステップと、
前記第1段階埋め込み構造体の両面にはんだマスクを形成し、前記はんだマスク上に開口部を開け、前記第2回路層と前記第1回路層の表面を露出させ、前記第2回路層と前記第1回路層の表面を金属化処理するステップとを含む。
仮支持プレートを用意し、前記仮支持プレートの上下面の少なくとも一面に第2回路層を作製し、前記第2回路層を覆って第1誘電体層を作製するステップと、
前記第1誘電体層をパターン画像化処理して硬化させ、前記第2回路層の表面を露出させ、フォトレジストを積層した後に、パターン画像化処理を行って金属柱パターンを得て、電気メッキして金属柱を形成するステップと、
フォトレジストを除去してキャビティを形成し、前記キャビティ内にデバイスを実装して熱硬化させ、前記デバイスの端子が設置された面を前記キャビティの開口側に向けるステップと、
第2誘電体層を作製するステップであって、前記デバイスが前記第2誘電体層内に埋め込まれ、かつ前記第2誘電体層の表面が前記端子の表面より設定値だけ高いステップと、
前記第2誘電体層の表面に、前記端子に直接接続される第1回路層を作製するステップであって、前記第1回路層は前記金属柱を介して前記第2回路層に接続されるステップと、
前記仮支持プレートを分割して、第1段階埋め込み構造体を形成するステップと、
前記第1段階埋め込み構造体の両面にはんだマスクを形成し、前記はんだマスク上に開口部を開け、前記第2回路層と前記第1回路層の表面を露出させ、前記第2回路層と前記第1回路層の表面を金属化処理するステップとを含む。
対向して設置される第1表面および第2表面を含む誘電体層と、
前記誘電体層に埋め込まれたデバイスと端子であって、前記デバイスの前記端子が設置された面と前記第1表面との差が設定値であり、前記デバイスの非端子面は前記第2表面と面一である、デバイスと端子と、
前記誘電体層の第1表面に設置され、前記端子に直接電気的に接続される第1回路層と、
前記誘電体層の第2表面と面一になるように第2表面に設置される第2回路層と、
前記第1回路層および前記第2回路層を接続するための金属柱とを備える。
第1段階埋め込み構造体の両面にはんだマスク700を形成し、はんだマスク700上に開口部を開けて第2回路層310と第1回路層300の表面を露出させ、第2回路層310と第1回路層300の表面を金属化処理する。
第1段階埋め込み構造体の両面にはんだマスク700を形成し、はんだマスク700上に開口部を開けて第2回路層310と第1回路層300の表面を露出させ、第2回路層310と第1回路層300の表面を金属化処理する。
110 誘電体層第1表面
120 誘電体層第2表面
130 第1誘電体層
140 第2誘電体層
200 デバイス
210 端子
220 非端子面
230 キャビティ
240 接着材料
250 キャビティ開口部
300 第1回路層
310 第2回路層
320 シード層
330 金属表面層
400 金属柱
410 金属柱パターン
500 仮支持プレート
510 有機層
520 第1金属層
530 第2金属層
540 保護層
550 プレート分割面
600 フォトレジスト
700 はんだマスク
Claims (8)
- 仮支持プレートを用意し、前記仮支持プレートの上下面の少なくとも一面に第2回路層を作製し、前記第2回路層を覆って第1誘電体層を作製するステップと、
前記第1誘電体層をパターン画像化処理して硬化させ、キャビティを形成し、前記第2回路層の上面を露出させ、前記キャビティ内にデバイスを実装して熱硬化させ、前記デバイスの端子が設置された面を前記キャビティの開口側に向けるステップと、
前記第2誘電体層を作製するステップであって、前記デバイスが前記第2誘電体層内に埋め込まれ、かつ前記第2誘電体層の表面が前記端子の表面より設定値だけ高いステップと、
前記第2誘電体層の表面に、前記端子に接続される第1回路層を作製し、かつ前記第2誘電体層を貫通して金属柱を作製するステップであって、前記第1回路層は前記金属柱を介して前記第2回路層に接続されるステップと、
前記仮支持プレートを分割して、第1段階埋め込み構造体を形成するステップと、
前記第1段階埋め込み構造体の両面にはんだマスクを形成し、前記はんだマスク上に開口部を開け、前記第2回路層と前記第1回路層の表面を露出させ、前記第2回路層と前記第1回路層の表面を金属化処理するステップと、を含むことを特徴とする埋め込み構造の作製方法。 - 前記仮支持プレートの上下面の少なくとも一面に第2回路層を作製する具体的な方法は、
前記仮支持プレートの上下面の少なくとも一面にフォトレジストを積層するステップと、
前記フォトレジストを露光し、現像して前記第2回路層の開口部パターンを得るステップと、
前記開口部パターンに電気メッキを施し、フォトレジストを除去し、前記第2回路層を形成するステップと、を含むことを特徴とする請求項1に記載の埋め込み構造の作製方法。 - 前記第2誘電体層の表面に前記端子に直接接続される第1回路層を作製し、かつ前記第2誘電体層を貫通して金属柱を作製する具体的な方法は、
無電解銅メッキまたはスパッタリングによって前記第2誘電体層の表面に金属シード層を形成するステップと、
フォトレジストを積層し、前記フォトレジストをパターン画像化処理し、前記第1回路層パターンおよび前記金属柱パターンを露出させるステップと、
前記第1回路層パターンおよび前記金属柱パターンに電気メッキを施して前記第1回路層および前記金属柱を形成するステップとを含み、
前記第1回路層はシード層を介して前記端子と直接電気的に接続されることを特徴とする請求項1に記載の埋め込み構造の作製方法。 - 前記設定値の取り得る値の範囲は、5~30μmであることを特徴とする請求項1に記載の埋め込み構造の作製方法。
- 前記仮支持プレートは4層の対称構造であり、中間から両面まで順に有機層、第1金属層、第2金属層、保護層であることを特徴とする請求項1に記載の埋め込み構造の作製方法。
- 前記キャビティ内にデバイスを実装して熱硬化させる具体的な方法は、
前記デバイス非端子面に超薄型フィルム接着剤を塗布し、加熱して前記デバイスを前記キャビティの下の仮支持プレートに直接接着させるステップ、
あるいは、前記キャビティの底部に接着材料を塗布することによって、前記デバイスを前記接着材料に粘着固定させるステップを含むことを特徴とする請求項1に記載の埋め込み構造の作製方法。 - 前記第1誘電体層と前記第2誘電体層の誘電体材料は、感光性誘電体材料または非感光性誘電体材料であることを特徴とする請求項1に記載の埋め込み構造の作製方法。
- 仮支持プレートを用意し、前記仮支持プレートの上下面の少なくとも一面に第2回路層を作製し、前記第2回路層を覆って第1誘電体層を作製するステップと、
前記第1誘電体層をパターン画像化処理して硬化させ、前記第2回路層の表面を露出させ、フォトレジストを積層した後に、パターン画像化処理を行って金属柱パターンを得て、電気メッキをして金属柱を形成するステップと、
フォトレジストを除去することによって、キャビティを形成し、前記キャビティ内にデバイスを実装して熱硬化させ、前記デバイスの端子が設置された面を前記キャビティの開口側に向けるステップと、
第2誘電体層を作製するステップであって、前記デバイスが前記第2誘電体層内に埋め込まれ、かつ前記第2誘電体層の表面が前記端子の表面より設定値だけ高いステップと、
前記第2誘電体層の表面に、前記端子に直接接続される第1回路層を作製するステップであって、前記第1回路層は前記金属柱を介して前記第2回路層に接続されるステップと、
前記仮支持プレートを分割して、第1段階埋め込み構造体を形成するステップと、
前記第1段階埋め込み構造体の両面にはんだマスクを形成し、前記はんだマスク上に開口部を開け、前記第2回路層と前記第1回路層の表面を露出させ、前記第2回路層と前記第1回路層の表面を金属化処理するステップと、を含むことを特徴とする埋め込み構造の作製方法。
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