CN210575899U - 嵌入式多芯片及元件sip扇出型封装结构 - Google Patents
嵌入式多芯片及元件sip扇出型封装结构 Download PDFInfo
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- CN210575899U CN210575899U CN201921705539.1U CN201921705539U CN210575899U CN 210575899 U CN210575899 U CN 210575899U CN 201921705539 U CN201921705539 U CN 201921705539U CN 210575899 U CN210575899 U CN 210575899U
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18162—Exposing the passive side of the semiconductor or solid-state body of a chip with build-up interconnect
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- H—ELECTRICITY
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- H—ELECTRICITY
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CN110600438A (zh) * | 2019-10-12 | 2019-12-20 | 广东佛智芯微电子技术研究有限公司 | 嵌入式多芯片及元件sip扇出型封装结构及其制作方法 |
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Cited By (1)
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CN110600438A (zh) * | 2019-10-12 | 2019-12-20 | 广东佛智芯微电子技术研究有限公司 | 嵌入式多芯片及元件sip扇出型封装结构及其制作方法 |
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Denomination of utility model: Embedded multi chip and component SIP fan out packaging structure Effective date of registration: 20201224 Granted publication date: 20200519 Pledgee: Guangdong Nanhai Rural Commercial Bank branch branch of Limited by Share Ltd. Pledgor: Guangdong fozhixin microelectronics technology research Co.,Ltd.|Guangdong Xinhua Microelectronics Technology Co.,Ltd. Registration number: Y2020980009995 |
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Granted publication date: 20200519 Pledgee: Guangdong Nanhai Rural Commercial Bank branch branch of Limited by Share Ltd. Pledgor: Guangdong Xinhua Microelectronics Technology Co.,Ltd.|Guangdong fozhixin microelectronics technology research Co.,Ltd. Registration number: Y2020980009995 |
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Effective date of registration: 20240318 Address after: Room A107, scientific research building, block a, neifo high tech think tank center, Nanhai Software Science Park, Shishan town, Nanhai District, Foshan City, Guangdong Province, 528225 Patentee after: Guangdong fozhixin microelectronics technology research Co.,Ltd. Country or region after: China Address before: Room A107, scientific research building, block a, neifo high tech think tank center, Nanhai Software Science Park, Shishan town, Nanhai District, Foshan City, Guangdong Province, 528225 Patentee before: Guangdong fozhixin microelectronics technology research Co.,Ltd. Country or region before: China Patentee before: Guangdong Xinhua Microelectronics Technology Co.,Ltd. |
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