JP7204770B2 - 両面冷却型パワーモジュールおよびその製造方法 - Google Patents
両面冷却型パワーモジュールおよびその製造方法 Download PDFInfo
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- JP7204770B2 JP7204770B2 JP2020550787A JP2020550787A JP7204770B2 JP 7204770 B2 JP7204770 B2 JP 7204770B2 JP 2020550787 A JP2020550787 A JP 2020550787A JP 2020550787 A JP2020550787 A JP 2020550787A JP 7204770 B2 JP7204770 B2 JP 7204770B2
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- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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Description
Claims (11)
- 複数の金属プレートが一面に形成された第1基板と、
前記第1基板と離隔され、前記第1基板の複数の金属プレートと対向する一面に複数の金属プレートが形成された第2基板と、
前記第1基板と前記第2基板との間に備えられ、IGBT(insulated gate bipolar mode transistor)半導体素子を有する複数のパワー素子と、
前記複数のパワー素子のそれぞれの第1面に形成され、ゲート(gate)電極およびエミッタ(emitter)電極を有する第1電極と、
前記複数のパワー素子のそれぞれの第2面に形成され、コレクタ(collector)電極を有する第2電極と、を有し、
前記複数のパワー素子は、
前記第1電極が前記第2基板の金属プレートのうちの前記ゲート電極および前記エミッタ電極がそれぞれ接続される金属プレートと接合され、前記第2電極が前記第1基板の金属プレートのうちの前記コレクタ電極が接続される金属プレートと接合される第1パワー素子と、
前記第1電極が前記第1基板の金属プレートのうちの前記ゲート電極および前記エミッタ電極がそれぞれ接続される金属プレートと接合され、前記第2電極が前記第2基板の金属プレートのうちの前記コレクタ電極が接続される金属プレートと接合される第2パワー素子と、を有し、
前記第1基板および前記第2基板のそれぞれの金属プレートのうちの信号ピンおよび端子が接合される金属プレートは、少なくとも1つの隙間を有するようにする少なくとも1つのスリットが形成され、前記少なくとも1つのスリットによって複数の金属プレートに区分される、パワーモジュール。 - 前記第1基板および第2基板のそれぞれに形成された複数の金属プレートのうちの前記ゲート電極が接続される金属プレートは、前記ゲート電極と一部が接合され、他の一部が前記信号ピンまたは端子と接合される、請求項1に記載のパワーモジュール。
- 前記パワーモジュールは、前記ゲート電極と前記信号ピンまたは端子とを連結するワイヤを備えていない、請求項2に記載のパワーモジュール。
- 前記第1基板の複数の金属プレートのうちのいずれか1つは、前記第1パワー素子のコレクタ電極に接続される金属プレートと前記第2パワー素子のエミッタ電極に接続される金属プレートとにより提供され、
前記いずれかの金属プレートは、前記第1パワー素子のコレクタ電極と前記第2パワー素子のエミッタ電極とを電気的に連結する、請求項1に記載のパワーモジュール。 - 前記コレクタ電極にはスペーサが接合され、
前記いずれか1つの金属プレートは、前記第1パワー素子のコレクタ電極に接合されたスペーサおよび前記第2パワー素子のエミッタ電極と接合される、請求項4に記載のパワーモジュール。 - 前記第1基板の他面および前記第2基板の他面のそれぞれに金属プレートがさらに形成される、請求項1に記載のパワーモジュール。
- パワーモジュールの製造方法であって、
第1基板と第2基板とが対向する一面のそれぞれに接合材料を印刷するステップと、
前記第1基板と前記第2基板との間に複数のパワー素子を実装するステップと、
前記第1基板、前記第2基板および前記複数のパワー素子が接合されるように焼結(sintering)するステップと、を有し、
前記複数のパワー素子は、第1面に形成される第1電極および前記第1面の反対面である第2面に形成される第2電極を有し、
前記実装するステップは、
前記複数のパワー素子のうちの第1パワー素子を、第1面に形成された第1電極が前記第2基板を向くように実装するステップと、
前記複数のパワー素子のうちの第2パワー素子を、第1面に形成された第1電極が前記第1基板を向くように実装するステップと、を有する、パワーモジュールの製造方法。 - 前記複数のパワー素子は、IGBT半導体素子を有し、
前記第1電極は、ゲート電極およびエミッタ電極を有し、
前記第2電極は、コレクタ電極を有する、請求項7に記載のパワーモジュールの製造方法。 - 前記実装するステップは、前記第1基板と前記第2基板との間に、前記複数のパワー素子、複数のダイオード、ならびに信号ピンおよび端子を有するリードフレームを実装するステップを有する、請求項8に記載のパワーモジュールの製造方法。
- 前記焼結するステップは、前記第1基板および前記第2基板のそれぞれの第1金属プレートが、前記複数のパワー素子のうちのいずれか1つのゲート電極と一部が接合され、前記信号ピンまたは端子と他の一部が接合されるように焼結するステップを有する、請求項9に記載のパワーモジュールの製造方法。
- 前記焼結された第1基板と第2基板との間に絶縁材料がモールドされるステップと、
前記リードフレームのうち、前記信号ピンおよび端子を除いたフレームがカットされ、前記信号ピンおよび端子が予め設定された形態に形成されるステップと、
前記信号ピンおよび端子の絶縁のための絶縁材料がモールドされるステップと、をさらに有する、請求項9に記載のパワーモジュールの製造方法。
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