JP7118928B2 - 半導体ウエハの局所的歪みの特定に基づく全体的ウエハ歪みの改善 - Google Patents
半導体ウエハの局所的歪みの特定に基づく全体的ウエハ歪みの改善 Download PDFInfo
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- JP7118928B2 JP7118928B2 JP2019143000A JP2019143000A JP7118928B2 JP 7118928 B2 JP7118928 B2 JP 7118928B2 JP 2019143000 A JP2019143000 A JP 2019143000A JP 2019143000 A JP2019143000 A JP 2019143000A JP 7118928 B2 JP7118928 B2 JP 7118928B2
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
- H10P74/238—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes comprising acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection or in-situ thickness measurement
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T5/00—Image enhancement or restoration
- G06T5/80—Geometric correction
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70491—Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes
- G03F7/70525—Controlling normal operating mode, e.g. matching different apparatus, remote control or prediction of failure
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- G—PHYSICS
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- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70605—Workpiece metrology
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- G03F7/70625—Dimensions, e.g. line width, critical dimension [CD], profile, sidewall angle or edge roughness
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- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
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- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70691—Handling of masks or workpieces
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
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- H10P72/0431—Apparatus for thermal treatment
- H10P72/0436—Apparatus for thermal treatment mainly by radiation
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
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- H10P72/0448—Apparatus for applying a liquid, a resin, an ink or the like
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
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- H10P72/0616—Monitoring of warpages, curvatures, damages, defects or the like
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/50—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/76—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches
- H10P72/7604—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support
- H10P72/7614—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a plurality of individual support members, e.g. support posts or protrusions
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
- H10P74/203—Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/27—Structural arrangements therefor
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/27—Structural arrangements therefor
- H10P74/273—Interconnections for measuring or testing, e.g. probe pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
- H10P76/204—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
- H10P76/2041—Photolithographic processes
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- G—PHYSICS
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- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- Data Mining & Analysis (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US16/054725 | 2018-08-03 | ||
| US16/054,725 US10622233B2 (en) | 2016-09-05 | 2018-08-03 | Amelioration of global wafer distortion based on determination of localized distortions of a semiconductor wafer |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2020021076A JP2020021076A (ja) | 2020-02-06 |
| JP2020021076A5 JP2020021076A5 (enExample) | 2021-10-21 |
| JP7118928B2 true JP7118928B2 (ja) | 2022-08-16 |
Family
ID=69487426
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2019143000A Active JP7118928B2 (ja) | 2018-08-03 | 2019-08-02 | 半導体ウエハの局所的歪みの特定に基づく全体的ウエハ歪みの改善 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US10622233B2 (enExample) |
| JP (1) | JP7118928B2 (enExample) |
| KR (1) | KR102558635B1 (enExample) |
| CN (1) | CN110807273B (enExample) |
| TW (1) | TWI790391B (enExample) |
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| US10847419B2 (en) * | 2018-03-14 | 2020-11-24 | Raytheon Company | Stress compensation and relief in bonded wafers |
| JP7198912B2 (ja) * | 2018-08-22 | 2023-01-04 | エーエスエムエル ネザーランズ ビー.ブイ. | 基板全体の面内ディストーション(ipd)を決定する方法、及びコンピュータプログラム |
| US11393118B2 (en) * | 2019-06-18 | 2022-07-19 | Kla Corporation | Metrics for asymmetric wafer shape characterization |
| US11879170B2 (en) | 2019-08-14 | 2024-01-23 | Massachusetts Institute Of Technology | Stress patterning systems and methods for manufacturing free-form deformations in thin substrates |
| JP2023525964A (ja) * | 2020-05-14 | 2023-06-20 | エーエスエムエル ネザーランズ ビー.ブイ. | 製品フィーチャに対する解像度メトロロジを用いるウェーハアライメントの方法 |
| US12276922B2 (en) | 2020-05-22 | 2025-04-15 | Tokyo Electron Limited | Backside deposition tuning of stress to control wafer bow in semiconductor processing |
| US11637043B2 (en) * | 2020-11-03 | 2023-04-25 | Applied Materials, Inc. | Analyzing in-plane distortion |
| US11829077B2 (en) * | 2020-12-11 | 2023-11-28 | Kla Corporation | System and method for determining post bonding overlay |
| KR20230139433A (ko) * | 2021-02-03 | 2023-10-05 | 도쿄엘렉트론가부시키가이샤 | 막 두께 분석 방법, 막 두께 분석 장치 및 기억 매체 |
| CN117223088A (zh) * | 2021-04-27 | 2023-12-12 | 应用材料公司 | 用于半导体处理的应力与重叠管理 |
| US12469725B2 (en) | 2021-06-27 | 2025-11-11 | Delta Design, Inc. | Method for determining corrective film pattern to reduce semiconductor wafer bow |
| US12394618B2 (en) | 2021-07-08 | 2025-08-19 | Tokyo Electron Limited | Method of adjusting wafer shape using multi-directional actuation films |
| US12051608B2 (en) * | 2021-07-20 | 2024-07-30 | Changxin Memory Technologies, Inc. | Method for adjusting wafer deformation and semiconductor structure |
| US11782411B2 (en) | 2021-07-28 | 2023-10-10 | Kla Corporation | System and method for mitigating overlay distortion patterns caused by a wafer bonding tool |
| KR20230048952A (ko) * | 2021-10-05 | 2023-04-12 | 삼성전자주식회사 | 풀-칩 레이아웃을 이용한 레이아웃 검증 시스템 및 이를 이용한 레이아웃 검증 방법 |
| US12001147B2 (en) | 2021-11-19 | 2024-06-04 | Tokyo Electron Limited | Precision multi-axis photolithography alignment correction using stressor film |
| EP4202551A1 (en) * | 2021-12-23 | 2023-06-28 | ASML Netherlands B.V. | Methods of determining a mechanical property of a layer applied to a substrate, and associated devices |
| WO2023104391A1 (en) * | 2021-12-06 | 2023-06-15 | Asml Netherlands B.V. | Methods of determining a mechanical property of a layer applied to a substrate, and associated devices |
| CN114391177B (zh) * | 2021-12-16 | 2025-05-16 | 长江存储科技有限责任公司 | 晶圆平坦度的预测 |
| US11994807B2 (en) | 2022-05-03 | 2024-05-28 | Tokyo Electron Limited | In-situ lithography pattern enhancement with localized stress treatment tuning using heat zones |
| CN119156686A (zh) * | 2022-05-13 | 2024-12-17 | 应用材料公司 | 使用基板曲率来进行剂量绘图以补偿平面外畸变 |
| KR20250008925A (ko) * | 2022-05-13 | 2025-01-16 | 어플라이드 머티어리얼스, 인코포레이티드 | 개선된 분해능을 갖는 기판 곡률 제어용 도즈 매핑 및 기판 회전 |
| US20240103385A1 (en) * | 2022-09-28 | 2024-03-28 | Applied Materials, Inc. | Frequency and Amplitude Modulation of Implant Dose for Stress Management |
| US20250028294A1 (en) * | 2023-07-18 | 2025-01-23 | Applied Materials, Inc. | Measurement of inherent substrate distortion |
| US20250216188A1 (en) * | 2023-12-31 | 2025-07-03 | Kla Corporation | Calibration for in-plane distortion tool-to-tool matching |
| WO2025184185A1 (en) * | 2024-02-28 | 2025-09-04 | Tignis, Inc. | Determination of thin film pattern to compensate substrate warpage |
| US12510831B2 (en) * | 2024-03-11 | 2025-12-30 | Kla Corporation | Robust and accurate overlay target design for CMP |
| US20260068690A1 (en) * | 2024-09-04 | 2026-03-05 | Tokyo Electron Limited | Fill shape optimization for substrate bonding |
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| JP2018041080A (ja) | 2016-09-05 | 2018-03-15 | 東京エレクトロン株式会社 | 半導体プロセッシング中のオーバレイを制御するための湾曲を制御する応力の位置特定チューニング |
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| JP6798017B6 (ja) * | 2016-10-17 | 2021-01-13 | エーエスエムエル ネザーランズ ビー.ブイ. | 基板にわたってパラメータ変動を修正する処理装置及び方法 |
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2018
- 2018-08-03 US US16/054,725 patent/US10622233B2/en active Active
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2019
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2015504170A (ja) | 2012-01-18 | 2015-02-05 | ユニヴェルシタ・デグリ・ストゥディ・ローマ・トレ | 材料のポアソン比および残留応力を測定するための方法 |
| JP2016538717A (ja) | 2013-10-29 | 2016-12-08 | ケーエルエー−テンカー コーポレイション | プロセス誘起による歪みの予測、ならびにオーバーレイ誤差のフィードフォワード及びフィードバック修正 |
| JP2017122716A (ja) | 2015-12-07 | 2017-07-13 | ウルトラテック インク | Cgs干渉分光法を用いた処理制御のためにプロセス誘導ウエハ形状を特徴化するシステムおよび方法 |
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| Publication number | Publication date |
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| KR102558635B1 (ko) | 2023-07-21 |
| CN110807273B (zh) | 2024-05-14 |
| US10622233B2 (en) | 2020-04-14 |
| JP2020021076A (ja) | 2020-02-06 |
| CN110807273A (zh) | 2020-02-18 |
| US20180342410A1 (en) | 2018-11-29 |
| KR20200015426A (ko) | 2020-02-12 |
| TW202025235A (zh) | 2020-07-01 |
| TWI790391B (zh) | 2023-01-21 |
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