JP6862470B2 - 電力効率のよい電圧レベルトランスレータ回路 - Google Patents

電力効率のよい電圧レベルトランスレータ回路 Download PDF

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Publication number
JP6862470B2
JP6862470B2 JP2018550674A JP2018550674A JP6862470B2 JP 6862470 B2 JP6862470 B2 JP 6862470B2 JP 2018550674 A JP2018550674 A JP 2018550674A JP 2018550674 A JP2018550674 A JP 2018550674A JP 6862470 B2 JP6862470 B2 JP 6862470B2
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Japan
Prior art keywords
voltage
voltage level
level translator
bypass
pull
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JP2018550674A
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Japanese (ja)
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JP2019516280A5 (enExample
JP2019516280A (ja
Inventor
ナドカルニ、ラーフル・クリシュナクマー
コレアーレ・ジュニア、アンソニー
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Qualcomm Inc
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Qualcomm Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0016—Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/012—Modifications of generator to improve response time or to decrease power consumption
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors
    • H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
    • H03K3/35613—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit the input circuit having a differential configuration
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors
    • H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
    • H03K3/356147—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit using pass gates
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
  • Manipulation Of Pulses (AREA)
JP2018550674A 2016-03-31 2017-03-10 電力効率のよい電圧レベルトランスレータ回路 Active JP6862470B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/087,812 US11223359B2 (en) 2016-03-31 2016-03-31 Power efficient voltage level translator circuit
US15/087,812 2016-03-31
PCT/US2017/021935 WO2017172329A1 (en) 2016-03-31 2017-03-10 Power efficient voltage level translator circuit

Publications (3)

Publication Number Publication Date
JP2019516280A JP2019516280A (ja) 2019-06-13
JP2019516280A5 JP2019516280A5 (enExample) 2020-03-26
JP6862470B2 true JP6862470B2 (ja) 2021-04-21

Family

ID=58428362

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2018550674A Active JP6862470B2 (ja) 2016-03-31 2017-03-10 電力効率のよい電圧レベルトランスレータ回路

Country Status (7)

Country Link
US (1) US11223359B2 (enExample)
EP (1) EP3437192B1 (enExample)
JP (1) JP6862470B2 (enExample)
KR (1) KR102434320B1 (enExample)
CN (1) CN108886355B (enExample)
BR (1) BR112018069953B1 (enExample)
WO (1) WO2017172329A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
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US10535386B2 (en) 2017-05-23 2020-01-14 Arm Limited Level shifter with bypass
US10574236B2 (en) * 2017-08-21 2020-02-25 Arm Limited Level shifter with bypass control
US10622975B2 (en) * 2018-06-11 2020-04-14 Semiconductor Components Industries, Llc Voltage translator using low voltage power supply
JP7494071B2 (ja) * 2020-09-23 2024-06-03 キオクシア株式会社 メモリシステム
US11764784B2 (en) * 2021-07-07 2023-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device including a level shifter and method of mitigating a delay between input and output signals
CN119182392A (zh) * 2023-06-21 2024-12-24 澜起电子科技(上海)有限公司 输出驱动电路、时钟芯片及电子设备

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JP4075823B2 (ja) 2004-02-25 2008-04-16 株式会社デンソー コンパレータ回路装置
US20050270065A1 (en) 2004-06-03 2005-12-08 Dipankar Bhattacharya Coms buffer having higher and lower voltage operation
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Also Published As

Publication number Publication date
WO2017172329A1 (en) 2017-10-05
BR112018069953A2 (pt) 2019-02-05
KR20180124894A (ko) 2018-11-21
EP3437192B1 (en) 2024-06-12
BR112018069953B1 (pt) 2024-03-05
CN108886355A (zh) 2018-11-23
US20170288673A1 (en) 2017-10-05
EP3437192A1 (en) 2019-02-06
US11223359B2 (en) 2022-01-11
JP2019516280A (ja) 2019-06-13
CN108886355B (zh) 2022-03-29
KR102434320B1 (ko) 2022-08-18

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