BR112018069953B1 - Circuito de conversor de nível de tensão de baixo consumo de energia - Google Patents

Circuito de conversor de nível de tensão de baixo consumo de energia Download PDF

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Publication number
BR112018069953B1
BR112018069953B1 BR112018069953-5A BR112018069953A BR112018069953B1 BR 112018069953 B1 BR112018069953 B1 BR 112018069953B1 BR 112018069953 A BR112018069953 A BR 112018069953A BR 112018069953 B1 BR112018069953 B1 BR 112018069953B1
Authority
BR
Brazil
Prior art keywords
voltage
voltage level
level converter
bypass
bypass mode
Prior art date
Application number
BR112018069953-5A
Other languages
English (en)
Portuguese (pt)
Other versions
BR112018069953A2 (pt
Inventor
Rahul Krishnakumar Nadkarni
Anthony Correale Jr
Original Assignee
Qualcomm Incorporated
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Incorporated filed Critical Qualcomm Incorporated
Publication of BR112018069953A2 publication Critical patent/BR112018069953A2/pt
Publication of BR112018069953B1 publication Critical patent/BR112018069953B1/pt

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/0185Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507Interface arrangements
    • H03K19/018521Interface arrangements of complementary type, e.g. CMOS
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/3296Power saving characterised by the action undertaken by lowering the supply or operating voltage
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008Arrangements for reducing power consumption
    • H03K19/0016Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/017Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01Details
    • H03K3/012Modifications of generator to improve response time or to decrease power consumption
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356104Bistable circuits using complementary field-effect transistors
    • H03K3/356113Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
    • H03K3/35613Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit the input circuit having a differential configuration
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356104Bistable circuits using complementary field-effect transistors
    • H03K3/356113Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
    • H03K3/356147Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit using pass gates
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
  • Manipulation Of Pulses (AREA)
BR112018069953-5A 2016-03-31 2017-03-10 Circuito de conversor de nível de tensão de baixo consumo de energia BR112018069953B1 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/087,812 2016-03-31
US15/087,812 US11223359B2 (en) 2016-03-31 2016-03-31 Power efficient voltage level translator circuit
PCT/US2017/021935 WO2017172329A1 (en) 2016-03-31 2017-03-10 Power efficient voltage level translator circuit

Publications (2)

Publication Number Publication Date
BR112018069953A2 BR112018069953A2 (pt) 2019-02-05
BR112018069953B1 true BR112018069953B1 (pt) 2024-03-05

Family

ID=58428362

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112018069953-5A BR112018069953B1 (pt) 2016-03-31 2017-03-10 Circuito de conversor de nível de tensão de baixo consumo de energia

Country Status (7)

Country Link
US (1) US11223359B2 (enExample)
EP (1) EP3437192B1 (enExample)
JP (1) JP6862470B2 (enExample)
KR (1) KR102434320B1 (enExample)
CN (1) CN108886355B (enExample)
BR (1) BR112018069953B1 (enExample)
WO (1) WO2017172329A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10535386B2 (en) 2017-05-23 2020-01-14 Arm Limited Level shifter with bypass
US10574236B2 (en) * 2017-08-21 2020-02-25 Arm Limited Level shifter with bypass control
US10622975B2 (en) * 2018-06-11 2020-04-14 Semiconductor Components Industries, Llc Voltage translator using low voltage power supply
JP7494071B2 (ja) * 2020-09-23 2024-06-03 キオクシア株式会社 メモリシステム
US11764784B2 (en) 2021-07-07 2023-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device including a level shifter and method of mitigating a delay between input and output signals
CN119182392A (zh) * 2023-06-21 2024-12-24 澜起电子科技(上海)有限公司 输出驱动电路、时钟芯片及电子设备

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JPH1184274A (ja) 1997-09-03 1999-03-26 Sumitomo Electric Ind Ltd 光スイッチ
JP3796034B2 (ja) 1997-12-26 2006-07-12 株式会社ルネサステクノロジ レベル変換回路および半導体集積回路装置
JP2001036398A (ja) 1999-07-16 2001-02-09 Matsushita Electric Ind Co Ltd レベルシフタ回路
JP3866111B2 (ja) 2002-01-18 2007-01-10 株式会社ルネサステクノロジ 半導体集積回路及びバーンイン方法
JP3657235B2 (ja) 2002-03-25 2005-06-08 Necマイクロシステム株式会社 レベルシフタ回路及び該レベルシフタ回路を備えた半導体装置
GB2421105B (en) * 2003-10-10 2006-08-09 Advanced Risc Mach Ltd Level shifting in a data processing apparatus
KR100558549B1 (ko) * 2003-12-05 2006-03-10 삼성전자주식회사 외부 전원전압 제어기능을 갖는 반도체 장치 및 그에 따른제어방법
JP4075823B2 (ja) 2004-02-25 2008-04-16 株式会社デンソー コンパレータ回路装置
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US7884645B2 (en) 2008-01-31 2011-02-08 Qualcomm Incorporated Voltage level shifting circuit and method
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US8111088B2 (en) 2010-04-26 2012-02-07 Qualcomm Incorporated Level shifter with balanced duty cycle
US8570077B2 (en) 2010-12-17 2013-10-29 Qualcomm Incorporated Methods and implementation of low-power power-on control circuits
US8339177B2 (en) * 2011-01-26 2012-12-25 Freescale Semiconductor, Inc. Multiple function power domain level shifter
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Also Published As

Publication number Publication date
US11223359B2 (en) 2022-01-11
KR102434320B1 (ko) 2022-08-18
EP3437192B1 (en) 2024-06-12
US20170288673A1 (en) 2017-10-05
EP3437192A1 (en) 2019-02-06
BR112018069953A2 (pt) 2019-02-05
CN108886355B (zh) 2022-03-29
JP6862470B2 (ja) 2021-04-21
JP2019516280A (ja) 2019-06-13
WO2017172329A1 (en) 2017-10-05
KR20180124894A (ko) 2018-11-21
CN108886355A (zh) 2018-11-23

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Legal Events

Date Code Title Description
B350 Update of information on the portal [chapter 15.35 patent gazette]
B06W Patent application suspended after preliminary examination (for patents with searches from other patent authorities) chapter 6.23 patent gazette]
B15K Others concerning applications: alteration of classification

Free format text: AS CLASSIFICACOES ANTERIORES ERAM: H03K 3/012 , H03K 3/356 , H03K 19/00 , H03K 19/017

Ipc: H03K 3/012 (2006.01), H03K 3/356 (2006.01), H03K 1

B09A Decision: intention to grant [chapter 9.1 patent gazette]
B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]

Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 10/03/2017, OBSERVADAS AS CONDICOES LEGAIS