CN108886355B - 高效功率电压电平转换器电路 - Google Patents
高效功率电压电平转换器电路 Download PDFInfo
- Publication number
- CN108886355B CN108886355B CN201780018467.0A CN201780018467A CN108886355B CN 108886355 B CN108886355 B CN 108886355B CN 201780018467 A CN201780018467 A CN 201780018467A CN 108886355 B CN108886355 B CN 108886355B
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- CN
- China
- Prior art keywords
- voltage
- voltage level
- bypass
- pull
- domain
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
- H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
- H03K19/0016—Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
- H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/012—Modifications of generator to improve response time or to decrease power consumption
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
- H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
- H03K3/35613—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit the input circuit having a differential configuration
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
- H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
- H03K3/356147—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit using pass gates
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Logic Circuits (AREA)
- Electronic Switches (AREA)
- Manipulation Of Pulses (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15/087,812 US11223359B2 (en) | 2016-03-31 | 2016-03-31 | Power efficient voltage level translator circuit |
| US15/087,812 | 2016-03-31 | ||
| PCT/US2017/021935 WO2017172329A1 (en) | 2016-03-31 | 2017-03-10 | Power efficient voltage level translator circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108886355A CN108886355A (zh) | 2018-11-23 |
| CN108886355B true CN108886355B (zh) | 2022-03-29 |
Family
ID=58428362
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201780018467.0A Active CN108886355B (zh) | 2016-03-31 | 2017-03-10 | 高效功率电压电平转换器电路 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US11223359B2 (enExample) |
| EP (1) | EP3437192B1 (enExample) |
| JP (1) | JP6862470B2 (enExample) |
| KR (1) | KR102434320B1 (enExample) |
| CN (1) | CN108886355B (enExample) |
| BR (1) | BR112018069953B1 (enExample) |
| WO (1) | WO2017172329A1 (enExample) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10535386B2 (en) | 2017-05-23 | 2020-01-14 | Arm Limited | Level shifter with bypass |
| US10574236B2 (en) * | 2017-08-21 | 2020-02-25 | Arm Limited | Level shifter with bypass control |
| US10622975B2 (en) * | 2018-06-11 | 2020-04-14 | Semiconductor Components Industries, Llc | Voltage translator using low voltage power supply |
| JP7494071B2 (ja) * | 2020-09-23 | 2024-06-03 | キオクシア株式会社 | メモリシステム |
| US11764784B2 (en) * | 2021-07-07 | 2023-09-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device including a level shifter and method of mitigating a delay between input and output signals |
| CN119182392A (zh) * | 2023-06-21 | 2024-12-24 | 澜起电子科技(上海)有限公司 | 输出驱动电路、时钟芯片及电子设备 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5015880A (en) * | 1989-10-10 | 1991-05-14 | International Business Machines Corporation | CMOS driver circuit |
| CN102624373A (zh) * | 2011-01-26 | 2012-08-01 | 飞思卡尔半导体公司 | 多功能功率域电平转换器 |
Family Cites Families (33)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5315179A (en) | 1992-09-28 | 1994-05-24 | Motorola, Inc. | BICMOS level converter circuit |
| JPH1084274A (ja) * | 1996-09-09 | 1998-03-31 | Matsushita Electric Ind Co Ltd | 半導体論理回路および回路レイアウト構造 |
| JPH1184274A (ja) | 1997-09-03 | 1999-03-26 | Sumitomo Electric Ind Ltd | 光スイッチ |
| JP3796034B2 (ja) | 1997-12-26 | 2006-07-12 | 株式会社ルネサステクノロジ | レベル変換回路および半導体集積回路装置 |
| JP2001036398A (ja) | 1999-07-16 | 2001-02-09 | Matsushita Electric Ind Co Ltd | レベルシフタ回路 |
| JP3866111B2 (ja) | 2002-01-18 | 2007-01-10 | 株式会社ルネサステクノロジ | 半導体集積回路及びバーンイン方法 |
| JP3657235B2 (ja) | 2002-03-25 | 2005-06-08 | Necマイクロシステム株式会社 | レベルシフタ回路及び該レベルシフタ回路を備えた半導体装置 |
| GB2421105B (en) | 2003-10-10 | 2006-08-09 | Advanced Risc Mach Ltd | Level shifting in a data processing apparatus |
| KR100558549B1 (ko) * | 2003-12-05 | 2006-03-10 | 삼성전자주식회사 | 외부 전원전압 제어기능을 갖는 반도체 장치 및 그에 따른제어방법 |
| JP4075823B2 (ja) | 2004-02-25 | 2008-04-16 | 株式会社デンソー | コンパレータ回路装置 |
| US20050270065A1 (en) | 2004-06-03 | 2005-12-08 | Dipankar Bhattacharya | Coms buffer having higher and lower voltage operation |
| US7145364B2 (en) * | 2005-02-25 | 2006-12-05 | Agere Systems Inc. | Self-bypassing voltage level translator circuit |
| JP2007228330A (ja) | 2006-02-24 | 2007-09-06 | Seiko Epson Corp | レベルシフタ回路及びそれを具備する半導体集積回路 |
| JP2007306042A (ja) | 2006-05-08 | 2007-11-22 | Sony Corp | レベル変換回路及びこれを用いた入出力装置 |
| JP5057713B2 (ja) * | 2006-07-03 | 2012-10-24 | 株式会社東芝 | スイッチング素子駆動回路 |
| JP4260176B2 (ja) | 2006-08-31 | 2009-04-30 | 株式会社沖データ | レベルシフト回路、駆動装置、ledヘッド及び画像形成装置 |
| KR100856128B1 (ko) | 2007-02-12 | 2008-09-03 | 삼성전자주식회사 | 고속 동작이 가능한 레벨 쉬프터 및 그 방법 |
| JP4926275B2 (ja) | 2007-03-31 | 2012-05-09 | サンディスク スリーディー,エルエルシー | トランジスタスナップバック保護を組み込むレベルシフタ回路 |
| US7696804B2 (en) | 2007-03-31 | 2010-04-13 | Sandisk 3D Llc | Method for incorporating transistor snap-back protection in a level shifter circuit |
| US7884645B2 (en) | 2008-01-31 | 2011-02-08 | Qualcomm Incorporated | Voltage level shifting circuit and method |
| US7733126B1 (en) | 2009-03-31 | 2010-06-08 | Freescale Semiconductor, Inc. | Negative voltage generation |
| US8111088B2 (en) | 2010-04-26 | 2012-02-07 | Qualcomm Incorporated | Level shifter with balanced duty cycle |
| US8570077B2 (en) * | 2010-12-17 | 2013-10-29 | Qualcomm Incorporated | Methods and implementation of low-power power-on control circuits |
| CN102324923B (zh) | 2011-08-18 | 2017-05-24 | 广东新岸线计算机系统芯片有限公司 | 一种电平移位电路 |
| US8786371B2 (en) | 2011-11-18 | 2014-07-22 | Skyworks Solutions, Inc. | Apparatus and methods for voltage converters |
| US8558603B2 (en) | 2011-12-15 | 2013-10-15 | Apple Inc. | Multiplexer with level shifter |
| JP5838141B2 (ja) | 2012-02-27 | 2015-12-24 | ルネサスエレクトロニクス株式会社 | 半導体集積回路 |
| US8872570B2 (en) | 2012-12-28 | 2014-10-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multiple power domain circuit and related method |
| US20150109045A1 (en) | 2013-10-21 | 2015-04-23 | Qualcomm Incorporated | Scalable layout architecture for metal-programmable voltage level shifter cells |
| GB2520726A (en) * | 2013-11-29 | 2015-06-03 | St Microelectronics Res & Dev | Read-out circuitry for an image sensor |
| US9325313B2 (en) | 2014-01-28 | 2016-04-26 | Broadcom Corporation | Low-power level-shift circuit for data-dependent signals |
| GB2528718B (en) | 2014-07-30 | 2021-05-05 | Advanced Risc Mach Ltd | Output signal generation circuitry for converting an input signal from a source voltage domain into an output signal for a destination voltage domain |
| US9912335B2 (en) * | 2015-07-08 | 2018-03-06 | Nxp B.V. | Configurable power domain and method |
-
2016
- 2016-03-31 US US15/087,812 patent/US11223359B2/en active Active
-
2017
- 2017-03-10 BR BR112018069953-5A patent/BR112018069953B1/pt active IP Right Grant
- 2017-03-10 JP JP2018550674A patent/JP6862470B2/ja active Active
- 2017-03-10 KR KR1020187028210A patent/KR102434320B1/ko active Active
- 2017-03-10 EP EP17714065.4A patent/EP3437192B1/en active Active
- 2017-03-10 CN CN201780018467.0A patent/CN108886355B/zh active Active
- 2017-03-10 WO PCT/US2017/021935 patent/WO2017172329A1/en not_active Ceased
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5015880A (en) * | 1989-10-10 | 1991-05-14 | International Business Machines Corporation | CMOS driver circuit |
| CN102624373A (zh) * | 2011-01-26 | 2012-08-01 | 飞思卡尔半导体公司 | 多功能功率域电平转换器 |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2017172329A1 (en) | 2017-10-05 |
| BR112018069953A2 (pt) | 2019-02-05 |
| KR20180124894A (ko) | 2018-11-21 |
| EP3437192B1 (en) | 2024-06-12 |
| BR112018069953B1 (pt) | 2024-03-05 |
| CN108886355A (zh) | 2018-11-23 |
| JP6862470B2 (ja) | 2021-04-21 |
| US20170288673A1 (en) | 2017-10-05 |
| EP3437192A1 (en) | 2019-02-06 |
| US11223359B2 (en) | 2022-01-11 |
| JP2019516280A (ja) | 2019-06-13 |
| KR102434320B1 (ko) | 2022-08-18 |
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Legal Events
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| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |