JP6687476B2 - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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- JP6687476B2 JP6687476B2 JP2016145289A JP2016145289A JP6687476B2 JP 6687476 B2 JP6687476 B2 JP 6687476B2 JP 2016145289 A JP2016145289 A JP 2016145289A JP 2016145289 A JP2016145289 A JP 2016145289A JP 6687476 B2 JP6687476 B2 JP 6687476B2
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Description
ら明らかになるであろう。
本発明の実施の形態1による炭化珪素半導体装置の構造について図4および図5A〜Dを用いて説明する。
本発明の実施の形態1に係る炭化珪素半導体装置の製造方法について図6Aから図10Eを用いて工程順に説明する。以下の説明に当たっては、図5Aの断面に対応する部分を主に図示し、必要に応じて、図5B、図5C、図5Dに対応する断面、および図4に対応する上面図も示す。
図6Aの断面図に示すように、n+型の4H−SiC基板101の主面上に、n−型の導電型を有するSiCからなるエピタキシャル層102を形成する。n+型のSiC基板101には、n型不純物が導入されている。このn型不純物は、例えば窒素(N)であり、このn型不純物の不純物濃度は、例えば1×1018〜1×1021cm−3の範囲である。
図7Aに示すように、次に、マスク301を除去した後、さらに別のマスク311を形成し、N型不純物701をイオン注入し、N型ソース領域211を形成する。N型不純物としては窒素(N)や燐(P)を用いることが出来る。N型ソース領域211の不純物濃度は、例えば1×1017〜1×1021cm−3の範囲とすることができる。N型ソース領域211の、エピタキシャル層102の表面からの深さは、例えば0.01〜0.2μm程度とすることができる。
図8A(a)に示すように、X1−X1’断面において、図7の工程と同じマスク311を用い、基板面の法線からX1に向かって傾斜させた方向からP型不純物801を注入する。具体的には、図7の工程では図8A(b)のように、基板面802に対して垂直にN型不純物701を注入したが、図8A(a)の工程では、図8A(c)のように、X1−X1’断面において基板面に対して鋭角θをなすようにしてP型不純物801を注入する。このとき、角度θは、P型不純物801の注入方向と基板面がなす角のうち、マスク311と反対側の角度により定義することにする。これによって、マスク311で遮蔽された部分の一部にP型不純物が侵入し、P型のチャネル領域(第1チャネル領域)201aが形成される。ここで、チャネル注入工程において、注入方向と半導体基板の法線方向のなす傾斜角は15°以上45°以下とした。すなわち、θは45°以上75°以下となる。
次に、マスク311を除去した後、別のマスク321を形成し、マスク321を遮蔽膜としてP型不純物1101をイオン注入し、P+型ボディコンタクト領域202を形成する。
図10C〜Eにより、図10BのX1−X1’断面図における、その後の工程を説明する。
1002 アクティブ領域
1003 ゲートパッド領域
1011 単位セル
101 SiC基板
102 エピタキシャル層
103 ドレイン電極
201 P型ボディ領域
201a 第1チャネル領域
201b 第2チャネル領域
202 P+型ボディコンタクト領域
204 JFET領域
211 N型ソース領域
301、311、321、331 マスク
221 ゲート絶縁膜
222 ゲート電極
230 ソースコンタクト領域
231 層間絶縁膜
232 ソース電極
Claims (15)
- 半導体基板の表面に形成され、第1導電型を有するチャネル領域と
第1導電型とは異なる第2導電型を有し、前記半導体基板の表面において、前記チャネル領域と接するように形成されたソース領域と
前記半導体基板の表面において、前記チャネル領域を挟んで前記ソース領域とは反対側に前記チャネル領域を接するように形成された、第2導電型を有するJFET領域と、
を有する単位セルが複数にわたって規則的に配置されたアクティブ領域を具備した半導体装置であって、
前記単位セルの配置は、互いに単位セルの辺同士が向きあう配置であり、
前記チャネル領域は、半導体基板の表面において、第1チャネル領域と、不純物濃度が第1チャネル領域よりも高い第2チャネル領域から構成されており、
前記第2チャネル領域は、前記第1チャネル領域以上の深さまで達しており、
前記第1チャネル領域および前記第2チャネル領域は、前記半導体基板の法線方向に対して傾斜した境界を持つ断面形状を有している、
ことを特徴とする半導体装置。 - 請求項1に記載の半導体装置において、
前記第2チャネル領域の不純物濃度は、前記第1チャネル領域の不純物濃度の1.6倍以上2.5倍以下となっている、
ことを特徴とする半導体装置。 - 請求項1に記載の半導体装置において、
前記単位セルは長方形または正方形となっている、
ことを特徴とする半導体装置。 - 請求項1に記載の半導体装置において、
前記JFET領域は矩形の領域となっており、
前記JFET領域の辺に沿って前記第1チャネル領域が形成され、
前記JFET領域の頂点に接して前記第2チャネル領域が形成されている、
ことを特徴とする半導体装置。 - 請求項1に記載の半導体装置において、
前記JFET領域は、前記チャネル領域によって囲まれている、
ことを特徴とする半導体装置。 - 請求項1に記載の半導体装置において、
前記単位セルを構成する前記ソース領域は、互いに隣り合う単位セル間で離間されており、かつ、八角形の形状を有する、
ことを特徴とする半導体装置。 - 請求項6に記載の半導体装置において、
前記八角形を構成する辺の長さは、1種または2種であり、最も長い辺に沿って前記第1チャネル領域が形成され、最も短い辺に沿って前記第2チャネル領域が形成されている、
ことを特徴とする半導体装置。 - 請求項6に記載の半導体装置において、
前記第1チャネル領域のチャネル長は、前記第2チャネル領域のチャネル長の1.1倍以上1.7倍以下である、
ことを特徴とする半導体装置。 - 請求項1に記載の半導体装置において、
前記チャネル領域と前記ソース領域の少なくとも一部の上に形成された、ゲート絶縁膜と、
前記ゲート絶縁膜の少なくとも一部の上に形成された、ゲート電極と、
前記ソース領域の下に形成された、第1導電型を有するボディ領域と、
前記ボディ領域に接し、不純物濃度が前記ボディ領域より高い第1導電形を有するボディコンタクト領域と、
前記ボディコンタクト領域に接するソース電極と、
半導体基板の前記表面と反対側の面に形成された、ドレイン電極と、を有する、
ことを特徴とする半導体装置。 - 半導体基板の表面に形成され、第1導電型を有するチャネル領域と、
第1導電型とは異なる第2導電型を有し、前記半導体基板の表面において、前記チャネル領域と接するように形成されたソース領域と、
前記半導体基板の表面において、前記チャネル領域を挟んで前記ソース領域とは反対側に前記チャネル領域を接するように形成された、第2導電型を有するJFET領域と、
を有する単位セルが複数にわたって規則的に配置されたアクティブ領域を具備した半導体装置であって、
前記単位セルの配置は、互いに単位セルの辺同士が向きあう配置であり、
前記チャネル領域は、半導体基板の表面において、第1チャネル領域と、不純物濃度が第1チャネル領域よりも高い第2チャネル領域から構成されており、
前記第2チャネル領域は、前記第1チャネル領域以上の深さまで達しており、
前記第1チャネル領域および前記第2チャネル領域は、前記半導体基板の法線方向に対して傾斜した境界を持つ断面形状を有している、
ことを特徴とする半導体装置の製造方法であって、
半導体基板上にマスクを形成する工程と、
前記マスクを遮蔽膜として前記第1導電型の不純物を注入して前記第1チャネル領域および前記第2チャネル領域を形成するチャネル注入工程と、
前記マスクを遮蔽膜として前記第2導電型の不純物を注入するソース注入工程と、を有し、
前記チャネル注入工程は、前記半導体基板の法線方向から傾斜した方向から、半導体基板を90度毎に回転させて4ステップの注入を行なう、
ことを特徴とする、半導体装置の製造方法。 - 前記チャネル注入工程を構成する4ステップの注入工程の際に、第2ステップ以降の注入においては、それ以前のステップで既に注入されている領域の一部にさらに重ねて注入を行なう、
ことを特徴とする、請求項10に記載の半導体装置の製造方法。 - 前記マスクの上面視図は、複数の単位セルが、X方向および前記X方向に直交するY方向に繰り返されるように規則的に二次元行列状に配置されたパターンを有し、
前記チャネル注入工程の傾斜の方向は、前記X方向およびY方向に平行である、
ことを特徴とする、請求項10に記載の半導体装置の製造方法。 - 前記単位セルは長方形状または正方形状を有しており、
前記単位セルの一辺の方向は、前記チャネル注入工程におけるイオン入射方向と平行になっている、
ことを特徴とする、請求項12に記載の半導体装置の製造方法。 - 前記チャネル注入工程において、4ステップの注入は、傾斜角、不純物の種類、注入エネルギー、注入ドーズ量は同一で、回転角のみが異なる、
ことを特徴とする、請求項10に記載の半導体装置の製造方法。 - 前記チャネル注入工程において、注入方向と半導体基板の法線方向のなす傾斜角は15°以上45°以下である、
ことを特徴とする、請求項10に記載の半導体装置の製造方法。
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