JP6393566B2 - 配線基板、半導体装置及び配線基板の製造方法 - Google Patents

配線基板、半導体装置及び配線基板の製造方法 Download PDF

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Publication number
JP6393566B2
JP6393566B2 JP2014189223A JP2014189223A JP6393566B2 JP 6393566 B2 JP6393566 B2 JP 6393566B2 JP 2014189223 A JP2014189223 A JP 2014189223A JP 2014189223 A JP2014189223 A JP 2014189223A JP 6393566 B2 JP6393566 B2 JP 6393566B2
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JP
Japan
Prior art keywords
wiring
core portion
layer
core
hole
Prior art date
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Active
Application number
JP2014189223A
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English (en)
Japanese (ja)
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JP2016063046A (ja
JP2016063046A5 (https=
Inventor
淳史 佐藤
淳史 佐藤
清貴 望月
清貴 望月
小林　和弘
和弘 小林
深瀬　克哉
克哉 深瀬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2014189223A priority Critical patent/JP6393566B2/ja
Priority to US14/848,453 priority patent/US9961785B2/en
Publication of JP2016063046A publication Critical patent/JP2016063046A/ja
Publication of JP2016063046A5 publication Critical patent/JP2016063046A5/ja
Application granted granted Critical
Publication of JP6393566B2 publication Critical patent/JP6393566B2/ja
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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4697—Manufacturing multilayer circuits having cavities, e.g. for mounting components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
    • H05K1/185—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10015—Non-printed capacitor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2014189223A 2014-09-17 2014-09-17 配線基板、半導体装置及び配線基板の製造方法 Active JP6393566B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2014189223A JP6393566B2 (ja) 2014-09-17 2014-09-17 配線基板、半導体装置及び配線基板の製造方法
US14/848,453 US9961785B2 (en) 2014-09-17 2015-09-09 Wiring substrate and semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014189223A JP6393566B2 (ja) 2014-09-17 2014-09-17 配線基板、半導体装置及び配線基板の製造方法

Publications (3)

Publication Number Publication Date
JP2016063046A JP2016063046A (ja) 2016-04-25
JP2016063046A5 JP2016063046A5 (https=) 2017-06-01
JP6393566B2 true JP6393566B2 (ja) 2018-09-19

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014189223A Active JP6393566B2 (ja) 2014-09-17 2014-09-17 配線基板、半導体装置及び配線基板の製造方法

Country Status (2)

Country Link
US (1) US9961785B2 (https=)
JP (1) JP6393566B2 (https=)

Families Citing this family (15)

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US10199337B2 (en) * 2015-05-11 2019-02-05 Samsung Electro-Mechanics Co., Ltd. Electronic component package and method of manufacturing the same
US9984979B2 (en) 2015-05-11 2018-05-29 Samsung Electro-Mechanics Co., Ltd. Fan-out semiconductor package and method of manufacturing the same
JP6678090B2 (ja) * 2016-10-04 2020-04-08 新光電気工業株式会社 電子部品内蔵基板及びその製造方法と電子部品装置
JP7064349B2 (ja) * 2018-02-27 2022-05-10 新光電気工業株式会社 配線基板及びその製造方法
US10797017B2 (en) * 2018-03-20 2020-10-06 Unimicron Technology Corp. Embedded chip package, manufacturing method thereof, and package-on-package structure
EP3557608A1 (en) * 2018-04-19 2019-10-23 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Packaged integrated circuit with interposing functionality and method for manufacturing such a packaged integrated circuit
JP7210191B2 (ja) * 2018-08-30 2023-01-23 京セラ株式会社 電子素子実装用基板、電子装置、および電子モジュール
KR102595864B1 (ko) * 2018-12-07 2023-10-30 삼성전자주식회사 반도체 패키지
US10903169B2 (en) 2019-04-30 2021-01-26 Advanced Semiconductor Engineering, Inc. Conductive structure and wiring structure including the same
US11069605B2 (en) 2019-04-30 2021-07-20 Advanced Semiconductor Engineering, Inc. Wiring structure having low and high density stacked structures
US11145624B2 (en) * 2019-07-26 2021-10-12 Advanced Semiconductor Engineering, Inc. Semiconductor device package and method for manufacturing the same
US11183765B2 (en) 2020-02-05 2021-11-23 Samsung Electro-Mechanics Co., Ltd. Chip radio frequency package and radio frequency module
US11101840B1 (en) * 2020-02-05 2021-08-24 Samsung Electro-Mechanics Co., Ltd. Chip radio frequency package and radio frequency module
KR102950446B1 (ko) * 2020-06-30 2026-04-09 삼성전기주식회사 인쇄회로기판
US11978695B2 (en) * 2021-04-19 2024-05-07 Samsung Electronics Co., Ltd. Semiconductor package and method of fabricating the same

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JP2006073763A (ja) * 2004-09-01 2006-03-16 Denso Corp 多層基板の製造方法
JP5395360B2 (ja) * 2008-02-25 2014-01-22 新光電気工業株式会社 電子部品内蔵基板の製造方法
KR101084252B1 (ko) * 2010-03-05 2011-11-17 삼성전기주식회사 전자소자 내장형 인쇄회로기판 및 그 제조방법
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JP2015220282A (ja) * 2014-05-15 2015-12-07 イビデン株式会社 プリント配線板
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JP6462480B2 (ja) * 2015-04-28 2019-01-30 新光電気工業株式会社 配線基板及び配線基板の製造方法
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JP6752553B2 (ja) * 2015-04-28 2020-09-09 新光電気工業株式会社 配線基板

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Publication number Publication date
US9961785B2 (en) 2018-05-01
US20160081194A1 (en) 2016-03-17
JP2016063046A (ja) 2016-04-25

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