JP6234797B2 - 配線基板ビア配置決定装置、方法及びプログラム - Google Patents

配線基板ビア配置決定装置、方法及びプログラム Download PDF

Info

Publication number
JP6234797B2
JP6234797B2 JP2013253418A JP2013253418A JP6234797B2 JP 6234797 B2 JP6234797 B2 JP 6234797B2 JP 2013253418 A JP2013253418 A JP 2013253418A JP 2013253418 A JP2013253418 A JP 2013253418A JP 6234797 B2 JP6234797 B2 JP 6234797B2
Authority
JP
Japan
Prior art keywords
arrangement
information
wiring board
relay
placement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2013253418A
Other languages
English (en)
Japanese (ja)
Other versions
JP2015111361A (ja
Inventor
隆一 八木澤
隆一 八木澤
勝志 三國
勝志 三國
隆明 山本
隆明 山本
大貴 齋藤
大貴 齋藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micronics Japan Co Ltd
Original Assignee
Micronics Japan Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micronics Japan Co Ltd filed Critical Micronics Japan Co Ltd
Priority to JP2013253418A priority Critical patent/JP6234797B2/ja
Priority to KR1020140130046A priority patent/KR101587399B1/ko
Priority to CN201410737328.1A priority patent/CN104701217B/zh
Publication of JP2015111361A publication Critical patent/JP2015111361A/ja
Application granted granted Critical
Publication of JP6234797B2 publication Critical patent/JP6234797B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Measuring Leads Or Probes (AREA)
JP2013253418A 2013-12-06 2013-12-06 配線基板ビア配置決定装置、方法及びプログラム Active JP6234797B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2013253418A JP6234797B2 (ja) 2013-12-06 2013-12-06 配線基板ビア配置決定装置、方法及びプログラム
KR1020140130046A KR101587399B1 (ko) 2013-12-06 2014-09-29 배선기판 비아 배치결정장치, 방법 및 컴퓨터 프로그램
CN201410737328.1A CN104701217B (zh) 2013-12-06 2014-12-05 布线基板导通孔配置确定装置及方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013253418A JP6234797B2 (ja) 2013-12-06 2013-12-06 配線基板ビア配置決定装置、方法及びプログラム

Publications (2)

Publication Number Publication Date
JP2015111361A JP2015111361A (ja) 2015-06-18
JP6234797B2 true JP6234797B2 (ja) 2017-11-22

Family

ID=53348198

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013253418A Active JP6234797B2 (ja) 2013-12-06 2013-12-06 配線基板ビア配置決定装置、方法及びプログラム

Country Status (3)

Country Link
JP (1) JP6234797B2 (zh)
KR (1) KR101587399B1 (zh)
CN (1) CN104701217B (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6673268B2 (ja) * 2017-03-14 2020-03-25 オムロン株式会社 管理装置、管理装置の制御方法、情報処理プログラム、および記録媒体
JP7123692B2 (ja) * 2018-08-13 2022-08-23 株式会社日本マイクロニクス 配線基板設計支援装置、配線基板ビア配置方法及び配線基板ビア配置プログラム

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06274571A (ja) * 1993-03-19 1994-09-30 Fujitsu Ltd プリント板設計支援システムにおける自動配線処理方式
JP2616243B2 (ja) * 1993-04-14 1997-06-04 日本電気株式会社 多層印刷配線板の配線方法
JPH09201558A (ja) * 1996-01-29 1997-08-05 Techno Kapura:Kk 塗布装置
US6839885B2 (en) * 2002-08-22 2005-01-04 Agilent Technologies, Inc. Determining via placement in the printed circuit board of a wireless test fixture
JP2005017121A (ja) * 2003-06-26 2005-01-20 Micronics Japan Co Ltd プローブカード
JP4559163B2 (ja) * 2004-08-31 2010-10-06 ルネサスエレクトロニクス株式会社 半導体装置用パッケージ基板およびその製造方法と半導体装置
KR101489798B1 (ko) * 2007-10-12 2015-02-04 신꼬오덴기 고교 가부시키가이샤 배선 기판
JP4542587B2 (ja) * 2008-02-04 2010-09-15 日本特殊陶業株式会社 電子部品検査装置用配線基板
JP5294982B2 (ja) 2009-05-21 2013-09-18 株式会社日本マイクロニクス 電気的接続装置
KR101121644B1 (ko) * 2009-09-17 2012-02-28 삼성전기주식회사 프로브 카드용 공간 변환기 및 공간 변환기의 복구 방법
JP5922331B2 (ja) * 2011-02-02 2016-05-24 ラピスセミコンダクタ株式会社 半導体装置の配線構造及びその製造方法

Also Published As

Publication number Publication date
JP2015111361A (ja) 2015-06-18
CN104701217B (zh) 2017-09-15
KR20150066434A (ko) 2015-06-16
KR101587399B1 (ko) 2016-01-21
CN104701217A (zh) 2015-06-10

Similar Documents

Publication Publication Date Title
CN104769594B (zh) 具有堵塞点的硬宏、包括该硬宏的集成电路和用于布线穿过硬宏的方法
CN110874518B (zh) 布线基板的设计辅助装置、导孔配置方法以及记录介质
US8479140B2 (en) Automatically creating vias in a circuit design
JP2006517053A (ja) 無関係な導電トレースを有する多層集積回路
EP2579171B1 (en) Wire harness continuity inspection method, and wire harness continuity inspection program
US9869697B2 (en) Wiring substrate with filled vias to accommodate custom terminals
JP6234797B2 (ja) 配線基板ビア配置決定装置、方法及びプログラム
US8832637B2 (en) Support apparatus and information processing method thereof
JP4275032B2 (ja) 回路基板の設計方法
EP2538357A1 (en) Wire harness connectivity inspection method and wire harness connectivity inspection program
EP2579403A1 (en) Wire harness conductivity inspection method and wire harness conductivity inspection programme
KR20100036971A (ko) 반도체 장치, 기판 설계 방법, 기판 설계 장치
JP4803997B2 (ja) 半導体集積装置、その設計方法、設計装置、およびプログラム
JP4983068B2 (ja) 半導体装置の設計支援装置、半導体装置の設計支援方法及び半導体装置の設計支援プログラム
EP3153359A1 (en) Circuit board structure
US20090243121A1 (en) Semiconductor integrated circuit and layout method for the same
CN114729962A (zh) 调试印刷电路板的方法、装置和计算机程序产品
US20130105990A1 (en) Semiconductor device
JPWO2007066411A1 (ja) 半導体装置などの回路の設計装置、その設計方法、及びプログラム
JP2008310527A (ja) 半導体集積回路のレイアウト設計装置及びレイアウト設計方法
JP2006293701A (ja) ネット表示プログラムおよびネット表示方法
JP2011216554A (ja) 半導体装置、半導体装置のレイアウト方法、及びプログラム
US20090007033A1 (en) Method to transfer failure analysis-specific data between data between design houses and fab's/FA labs
JP4426166B2 (ja) 半導体装置の設計方法、半導体装置設計用プログラム、及び半導体装置
JPWO2012073917A1 (ja) 配線チェック装置及び配線チェックシステム

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20160920

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20170912

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20170926

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20171025

R150 Certificate of patent or registration of utility model

Ref document number: 6234797

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250