JP6162458B2 - 配線基板、半導体装置及び配線基板の製造方法 - Google Patents

配線基板、半導体装置及び配線基板の製造方法 Download PDF

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Publication number
JP6162458B2
JP6162458B2 JP2013079781A JP2013079781A JP6162458B2 JP 6162458 B2 JP6162458 B2 JP 6162458B2 JP 2013079781 A JP2013079781 A JP 2013079781A JP 2013079781 A JP2013079781 A JP 2013079781A JP 6162458 B2 JP6162458 B2 JP 6162458B2
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JP
Japan
Prior art keywords
layer
insulating layer
wiring
hole
insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2013079781A
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English (en)
Japanese (ja)
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JP2014204005A (ja
JP2014204005A5 (enExample
Inventor
聡 春原
聡 春原
恵資 吉澤
恵資 吉澤
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2013079781A priority Critical patent/JP6162458B2/ja
Priority to US14/227,453 priority patent/US9681546B2/en
Publication of JP2014204005A publication Critical patent/JP2014204005A/ja
Publication of JP2014204005A5 publication Critical patent/JP2014204005A5/ja
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Publication of JP6162458B2 publication Critical patent/JP6162458B2/ja
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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H01L23/49894—Materials of the insulating layers or coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673—Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15172—Fan-out arrangement of the internal vias
    • H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0206—Materials
    • H05K2201/0209—Inorganic, non-metallic particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09627—Special connections between adjacent vias, not for grounding vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2013079781A 2013-04-05 2013-04-05 配線基板、半導体装置及び配線基板の製造方法 Active JP6162458B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2013079781A JP6162458B2 (ja) 2013-04-05 2013-04-05 配線基板、半導体装置及び配線基板の製造方法
US14/227,453 US9681546B2 (en) 2013-04-05 2014-03-27 Wiring substrate and semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013079781A JP6162458B2 (ja) 2013-04-05 2013-04-05 配線基板、半導体装置及び配線基板の製造方法

Publications (3)

Publication Number Publication Date
JP2014204005A JP2014204005A (ja) 2014-10-27
JP2014204005A5 JP2014204005A5 (enExample) 2016-02-18
JP6162458B2 true JP6162458B2 (ja) 2017-07-12

Family

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JP2013079781A Active JP6162458B2 (ja) 2013-04-05 2013-04-05 配線基板、半導体装置及び配線基板の製造方法

Country Status (2)

Country Link
US (1) US9681546B2 (enExample)
JP (1) JP6162458B2 (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015233041A (ja) * 2014-06-09 2015-12-24 イビデン株式会社 パッケージ基板
JP2016021496A (ja) * 2014-07-15 2016-02-04 イビデン株式会社 配線基板及びその製造方法
JP2016219478A (ja) * 2015-05-15 2016-12-22 イビデン株式会社 配線基板及びその製造方法
JP6566726B2 (ja) * 2015-05-28 2019-08-28 新光電気工業株式会社 配線基板、及び、配線基板の製造方法
JP6444269B2 (ja) 2015-06-19 2018-12-26 新光電気工業株式会社 電子部品装置及びその製造方法
JP2017135135A (ja) * 2016-01-25 2017-08-03 京セラ株式会社 配線基板
CN107424974A (zh) * 2016-05-24 2017-12-01 胡迪群 具有埋入式噪声屏蔽墙的封装基板
JP7272527B2 (ja) * 2016-08-26 2023-05-12 サムソン エレクトロ－メカニックス カンパニーリミテッド． プリント回路基板
TWI669797B (zh) * 2016-11-16 2019-08-21 矽品精密工業股份有限公司 電子裝置及其製法與基板結構
US10643936B2 (en) * 2017-05-31 2020-05-05 Dyi-chung Hu Package substrate and package structure
US10622292B2 (en) 2018-07-06 2020-04-14 Qualcomm Incorporated High density interconnects in an embedded trace substrate (ETS) comprising a core layer
US20200279804A1 (en) * 2019-02-28 2020-09-03 Advanced Semiconductor Engineering, Inc. Wiring structure and method for manufacturing the same
US10790241B2 (en) 2019-02-28 2020-09-29 Advanced Semiconductor Engineering, Inc. Wiring structure and method for manufacturing the same
EP3709779A1 (en) * 2019-03-12 2020-09-16 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier and method of manufacturing the same
KR102669257B1 (ko) * 2019-07-12 2024-05-28 삼성전자주식회사 패키지 기판 및 이를 포함하는 반도체 패키지
JP2021197403A (ja) * 2020-06-10 2021-12-27 凸版印刷株式会社 多層配線基板及び多層配線基板の製造方法
EP4192202A4 (en) * 2020-07-29 2024-09-04 Kyocera Corporation CIRCUIT SUBSTRATE AND MANUFACTURING METHOD THEREOF
US12266597B2 (en) 2021-12-28 2025-04-01 Texas Instruments Incorporated Multilevel package substrate with stair shaped substrate traces
CN118055551A (zh) 2022-11-15 2024-05-17 华为技术有限公司 布线载板及其制造方法

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KR20070086860A (ko) * 1998-09-03 2007-08-27 이비덴 가부시키가이샤 다층프린트배선판 및 그 제조방법
JP2000332111A (ja) 1999-05-25 2000-11-30 Shinko Electric Ind Co Ltd 配線形成方法、多層配線基板及び半導体装置
JP2006049804A (ja) * 2004-07-07 2006-02-16 Shinko Electric Ind Co Ltd 配線基板の製造方法
JP4757056B2 (ja) 2006-02-21 2011-08-24 富士通株式会社 樹脂層の形成方法並びに半導体装置及びその製造方法
EP2026379B1 (en) * 2006-06-02 2012-08-15 Murata Manufacturing Co., Ltd. Multilayer ceramic electronic component and method for manufacturing same
US8455766B2 (en) * 2007-08-08 2013-06-04 Ibiden Co., Ltd. Substrate with low-elasticity layer and low-thermal-expansion layer
JP2008085373A (ja) * 2007-12-19 2008-04-10 Ibiden Co Ltd プリント配線板およびその製造方法
JP2009231818A (ja) * 2008-03-21 2009-10-08 Ibiden Co Ltd 多層プリント配線板及びその製造方法
JP2010153571A (ja) * 2008-12-25 2010-07-08 Shinko Electric Ind Co Ltd 配線基板及びその製造方法
JP5283075B2 (ja) * 2008-12-26 2013-09-04 学校法人慶應義塾 電子回路
JP2010157690A (ja) * 2008-12-29 2010-07-15 Ibiden Co Ltd 電子部品実装用基板及び電子部品実装用基板の製造方法
JP5478155B2 (ja) * 2009-08-27 2014-04-23 新光電気工業株式会社 接続端子付基板
JP5590869B2 (ja) * 2009-12-07 2014-09-17 新光電気工業株式会社 配線基板及びその製造方法並びに半導体パッケージ
JP5855905B2 (ja) * 2010-12-16 2016-02-09 日本特殊陶業株式会社 多層配線基板及びその製造方法

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JP2014204005A (ja) 2014-10-27
US20140301058A1 (en) 2014-10-09

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