JP6098447B2 - 炭化珪素半導体装置およびその製造方法 - Google Patents

炭化珪素半導体装置およびその製造方法 Download PDF

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Publication number
JP6098447B2
JP6098447B2 JP2013184813A JP2013184813A JP6098447B2 JP 6098447 B2 JP6098447 B2 JP 6098447B2 JP 2013184813 A JP2013184813 A JP 2013184813A JP 2013184813 A JP2013184813 A JP 2013184813A JP 6098447 B2 JP6098447 B2 JP 6098447B2
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Prior art keywords
silicon carbide
side wall
semiconductor device
angle
insulating film
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Japanese (ja)
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JP2015053359A5 (enExample
JP2015053359A (ja
Inventor
増田　健良
健良 増田
秀人 玉祖
秀人 玉祖
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Sumitomo Electric Industries Ltd
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Sumitomo Electric Industries Ltd
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Priority to JP2013184813A priority Critical patent/JP6098447B2/ja
Priority to US14/912,433 priority patent/US10014376B2/en
Priority to PCT/JP2014/068881 priority patent/WO2015033674A1/ja
Publication of JP2015053359A publication Critical patent/JP2015053359A/ja
Publication of JP2015053359A5 publication Critical patent/JP2015053359A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126—Top-view geometrical layouts of the regions or the junctions
    • H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • H10D30/0297—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the gate electrodes, e.g. to form trench gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40—Crystalline structures
    • H10D62/405—Orientations of crystalline planes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01366—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the semiconductor being silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/512—Disposition of the gate electrodes, e.g. buried gates
    • H10D64/513—Disposition of the gate electrodes, e.g. buried gates within recesses in the substrate, e.g. trench gates, groove gates or buried gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices

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  • Electrodes Of Semiconductors (AREA)
  • Recrystallisation Techniques (AREA)
JP2013184813A 2013-09-06 2013-09-06 炭化珪素半導体装置およびその製造方法 Active JP6098447B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2013184813A JP6098447B2 (ja) 2013-09-06 2013-09-06 炭化珪素半導体装置およびその製造方法
US14/912,433 US10014376B2 (en) 2013-09-06 2014-07-16 Silicon carbide semiconductor device having a trench with side walls and method for manufacturing same
PCT/JP2014/068881 WO2015033674A1 (ja) 2013-09-06 2014-07-16 炭化珪素半導体装置およびその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013184813A JP6098447B2 (ja) 2013-09-06 2013-09-06 炭化珪素半導体装置およびその製造方法

Publications (3)

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JP2015053359A JP2015053359A (ja) 2015-03-19
JP2015053359A5 JP2015053359A5 (enExample) 2016-06-23
JP6098447B2 true JP6098447B2 (ja) 2017-03-22

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US (1) US10014376B2 (enExample)
JP (1) JP6098447B2 (enExample)
WO (1) WO2015033674A1 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016213419A (ja) 2015-05-13 2016-12-15 住友電気工業株式会社 炭化珪素半導体装置
FR3038127B1 (fr) * 2015-06-24 2017-06-23 Commissariat Energie Atomique Procede de fabrication d'une pluralite de dipoles en forme d'ilots ayant des electrodes auto-alignees
JP6472776B2 (ja) * 2016-02-01 2019-02-20 富士電機株式会社 炭化珪素半導体装置および炭化珪素半導体装置の製造方法
DE102016226237B4 (de) 2016-02-01 2024-07-18 Fuji Electric Co., Ltd. Siliziumcarbid-halbleitervorrichtung
CN108735795B (zh) * 2017-04-21 2021-09-03 苏州能屋电子科技有限公司 (0001)面外延的六方相SiC晶圆、UMOSFET器件及其制作方法
WO2022009549A1 (ja) * 2020-07-10 2022-01-13 住友電気工業株式会社 炭化珪素半導体装置
CN117063292B (zh) 2021-03-22 2024-06-07 日立能源有限公司 功率半导体器件
CN113078050B (zh) * 2021-03-30 2023-03-10 安徽长飞先进半导体有限公司 一种C面SiC外延结构及外延沟槽的填充方法

Family Cites Families (12)

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Publication number Priority date Publication date Assignee Title
JP5017823B2 (ja) * 2005-09-12 2012-09-05 富士電機株式会社 半導体素子の製造方法
JP4046140B1 (ja) * 2006-11-29 2008-02-13 住友電気工業株式会社 炭化珪素半導体装置の製造方法
JP2008244455A (ja) * 2007-02-28 2008-10-09 Denso Corp 炭化珪素半導体装置およびその製造方法
JP4450241B2 (ja) * 2007-03-20 2010-04-14 株式会社デンソー 炭化珪素半導体装置の製造方法
JP5157843B2 (ja) 2007-12-04 2013-03-06 住友電気工業株式会社 炭化ケイ素半導体装置およびその製造方法
WO2010116887A1 (ja) * 2009-04-10 2010-10-14 住友電気工業株式会社 絶縁ゲート型電界効果トランジスタ
JP5721351B2 (ja) * 2009-07-21 2015-05-20 ローム株式会社 半導体装置
CN102971853B (zh) * 2010-08-03 2016-06-29 住友电气工业株式会社 半导体器件及其制造方法
JP2012146921A (ja) * 2011-01-14 2012-08-02 Denso Corp 炭化珪素半導体装置
EP2750198A4 (en) * 2011-08-26 2015-04-15 Nat Univ Corp Nara Inst SIC SEMICONDUCTOR ELEMENT AND MANUFACTURING METHOD THEREFOR
JP5699878B2 (ja) * 2011-09-14 2015-04-15 住友電気工業株式会社 炭化珪素半導体装置およびその製造方法
US8872280B2 (en) * 2012-07-31 2014-10-28 United Microelectronics Corp. Non-planar FET and manufacturing method thereof

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WO2015033674A1 (ja) 2015-03-12
US10014376B2 (en) 2018-07-03
US20160204206A1 (en) 2016-07-14
JP2015053359A (ja) 2015-03-19

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