JP6019252B2 - 成形レーザパッケージ（ｍｌｐ）パッケージ上のモールド貫通ビアの軽減溝 - Google Patents

成形レーザパッケージ（ｍｌｐ）パッケージ上のモールド貫通ビアの軽減溝 Download PDF

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Publication number
JP6019252B2
JP6019252B2 JP2015552852A JP2015552852A JP6019252B2 JP 6019252 B2 JP6019252 B2 JP 6019252B2 JP 2015552852 A JP2015552852 A JP 2015552852A JP 2015552852 A JP2015552852 A JP 2015552852A JP 6019252 B2 JP6019252 B2 JP 6019252B2
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Japan
Prior art keywords
solder ball
mold
grooves
solder
solder balls
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Expired - Fee Related
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JP2015552852A
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Japanese (ja)
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JP2016503242A (ja
JP2016503242A5 (enExample
Inventor
クリストファー・ジェイ・ヒーリー
ゴパール・シー・ジャー
マニュエル・アルドレーテ
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クアルコム，インコーポレイテッド
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H10W70/687—Shapes or dispositions thereof comprising multiple insulating layers characterized by the outer layers being for protection, e.g. solder masks, or for protection against chemical or mechanical damage
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0302—Properties and characteristics in general
    • H05K2201/0305—Solder used for other purposes than connections between PCB or components, e.g. for filling vias or for programmable patterns
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/242—Dispositions, e.g. layouts relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/281—Auxiliary members
    • H10W72/287—Flow barriers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)
JP2015552852A 2013-01-11 2014-01-13 成形レーザパッケージ（ｍｌｐ）パッケージ上のモールド貫通ビアの軽減溝 Expired - Fee Related JP6019252B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201361751313P 2013-01-11 2013-01-11
US61/751,313 2013-01-11
US13/777,298 2013-02-26
US13/777,298 US9313881B2 (en) 2013-01-11 2013-02-26 Through mold via relief gutter on molded laser package (MLP) packages
PCT/US2014/011230 WO2014110482A1 (en) 2013-01-11 2014-01-13 Through mold via relief gutter on molded laser package (mlp) packages

Publications (3)

Publication Number Publication Date
JP2016503242A JP2016503242A (ja) 2016-02-01
JP2016503242A5 JP2016503242A5 (enExample) 2016-07-21
JP6019252B2 true JP6019252B2 (ja) 2016-11-02

Family

ID=51164316

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015552852A Expired - Fee Related JP6019252B2 (ja) 2013-01-11 2014-01-13 成形レーザパッケージ（ｍｌｐ）パッケージ上のモールド貫通ビアの軽減溝

Country Status (6)

Country Link
US (1) US9313881B2 (enExample)
EP (1) EP2943977A1 (enExample)
JP (1) JP6019252B2 (enExample)
KR (1) KR101674155B1 (enExample)
CN (1) CN104919587B (enExample)
WO (1) WO2014110482A1 (enExample)

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KR20140139332A (ko) * 2013-05-27 2014-12-05 삼성전자주식회사 반도체 패키지 및 그 제조 방법
CN106463426B (zh) * 2014-06-27 2020-03-13 索尼公司 半导体器件及其制造方法
US10032652B2 (en) * 2014-12-05 2018-07-24 Advanced Semiconductor Engineering, Inc. Semiconductor package having improved package-on-package interconnection
US10090241B2 (en) * 2015-05-29 2018-10-02 Taiwan Semiconductor Manufacturing Co., Ltd. Device, package structure and method of forming the same
CN106872575B (zh) * 2017-01-05 2020-01-14 航天科工防御技术研究试验中心 一种塑封器件分层缺陷的分级风险评价方法
TW201837420A (zh) * 2017-04-14 2018-10-16 雙鴻科技股份有限公司 均溫板
US10629536B2 (en) 2018-04-05 2020-04-21 Micron Technology, Inc. Through-core via
CN111112835A (zh) * 2018-10-31 2020-05-08 东莞新科技术研究开发有限公司 一种激光分束装置和激光焊接方法
KR102688571B1 (ko) 2019-06-20 2024-07-25 삼성전자주식회사 반도체 패키지
US12027467B2 (en) * 2021-01-29 2024-07-02 Advanced Semiconductor Engineering, Inc. Semiconductor device package and method of manufacturing the same
CN117790327A (zh) * 2022-09-19 2024-03-29 星科金朋私人有限公司 半导体器件及其制造方法

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US4706167A (en) * 1983-11-10 1987-11-10 Telemark Co., Inc. Circuit wiring disposed on solder mask coating
US4996391A (en) * 1988-09-30 1991-02-26 Siemens Aktiengesellschaft Printed circuit board having an injection molded substrate
US5386627A (en) * 1992-09-29 1995-02-07 International Business Machines Corporation Method of fabricating a multi-layer integrated circuit chip interposer
US5784782A (en) 1996-09-06 1998-07-28 International Business Machines Corporation Method for fabricating printed circuit boards with cavities
US6329605B1 (en) * 1998-03-26 2001-12-11 Tessera, Inc. Components with conductive solder mask layers
JP3446825B2 (ja) * 1999-04-06 2003-09-16 沖電気工業株式会社 半導体装置およびその製造方法
JP2001053111A (ja) * 1999-08-10 2001-02-23 Matsushita Electric Works Ltd フリップチップ実装構造
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Also Published As

Publication number Publication date
WO2014110482A1 (en) 2014-07-17
JP2016503242A (ja) 2016-02-01
US9313881B2 (en) 2016-04-12
KR101674155B1 (ko) 2016-11-08
EP2943977A1 (en) 2015-11-18
KR20150104190A (ko) 2015-09-14
CN104919587A (zh) 2015-09-16
US20140196940A1 (en) 2014-07-17
CN104919587B (zh) 2019-12-13

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