JP5925364B2 - 電力用半導体装置 - Google Patents
電力用半導体装置 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 37
- 239000000463 material Substances 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 7
- 230000000295 complement effect Effects 0.000 claims description 2
- 230000010355 oscillation Effects 0.000 description 14
- 230000004048 modification Effects 0.000 description 13
- 238000012986 modification Methods 0.000 description 13
- 230000003071 parasitic effect Effects 0.000 description 9
- 230000007423 decrease Effects 0.000 description 7
- 239000011347 resin Substances 0.000 description 7
- 229920005989 resin Polymers 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 230000007246 mechanism Effects 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000005669 field effect Effects 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 230000009467 reduction Effects 0.000 description 3
- 230000000630 rising effect Effects 0.000 description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000010992 reflux Methods 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- 230000001052 transient effect Effects 0.000 description 2
- 229910000570 Cupronickel Inorganic materials 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- YOCUPQPZWBBYIX-UHFFFAOYSA-N copper nickel Chemical compound [Ni].[Cu] YOCUPQPZWBBYIX-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910000623 nickel–chromium alloy Inorganic materials 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
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Description
図1には、本発明に係る電力用半導体装置の実施の形態の3相インバータモジュール100の回路構成を示している。
なお、以上の説明においては、ゲート制御回路18および19の近傍にIGBT1〜6を配置するか、MOSFET7〜12を配置する構成とし、ゲート制御回路18および19の近傍に配置したスイッチングデバイスのゲートに抵抗素子を配置した構成を示したが、ゲート制御回路18および19から遠い位置に配置したスイッチングデバイスのゲートに抵抗素子を配置した構成としても良い。
ゲート制御回路18および19から遠い位置に配置したスイッチングデバイスのゲートに抵抗素子を配置した構成としては、図12に示すように、ゲート制御回路19の近傍にMOSFET10を配置し、ゲート制御回路19から遠い位置にIGBT4を配置した構成において、IGBT4のゲートに抵抗素子R1を接続した構成としても良い。
一般的に、スイッチングデバイスとしてIGBTとMOSFETとを並列して用いる構成においては、MOSFETとIGBTの閾値のみで両デバイスのオン、オフのタイミングを制御しているが、本発明においてはスイッチングデバイスに内蔵された抵抗素子と、IGBTおよびMOSFETの閾値のバランスによってオンおよびオフのタイミングを制御することで、MOSFETから先にターンオンし、その後にIGBTがターンオンする構成とする。
以上説明した3相インバータモジュール100においては、スイッチングデバイスに内蔵された抵抗素子と、IGBTおよびMOSFETの閾値のバランスによってオンおよびオフのタイミングを制御する構成を示したが、さらに抵抗素子にダイオード素子を直列に接続する構成としても良い。
以上説明した3相インバータモジュール100においては、IGBTとMOSFETのエミッタ−ソース間を接続するワイヤと、IGBTとMOSFETのゲートパッド間を接続するワイヤとは材質の異なるものを使用していた。すなわち、エミッタ−ソース間を接続するワイヤにはアルミワイヤを使用し、ゲートパッド間を接続するワイヤには金ワイヤや銅ワイヤを使用していた。
以上説明した3相インバータモジュール100においては、図2を用いて説明したように、リードフレームLF1のダイパッドP11およびP12にそれぞれゲート制御回路18および19を搭載し、リードフレームLF2のダイパッドP1〜P4にIGBT1〜6、MOSFET7〜12などのスイッチングデバイスを搭載し、リードフレームLF1とLF2とを対向して配置した構成を採っている。
以上説明した3相インバータモジュール100においては、図3を用いて説明したように、IGBT4はエミッタE側の平面内に2つのゲートパッドG1およびG2を有し、ゲートパッドG1とG2とはIGBT4内で繋がっており、ゲート制御回路19からゲートパッドG1に与えられたゲート制御信号はゲートパッドG2から取り出すことができる構成となっていた。
以上説明した3相インバータモジュール100においては、IGBT4やMOSFET10等のスイッチングデバイスに抵抗素子を内蔵する構成を採ったが、図10や図12を用いて説明したように、ゲート制御回路18および19から遠い位置に配置するスイッチングデバイスのゲートに抵抗素子を接続する構成においては、スイッチングデバイス間を接続するワイヤに、上記抵抗素子と同じ抵抗値を持たせる構成としても良い。
以上の説明においては、MOSFETやIGBTの種類については特に限定しなかったが、シリコン(Si)基板上に形成されるシリコン半導体装置として構成しても良いし、炭化シリコン(SiC)基板上に形成される炭化シリコン半導体装置や、窒化ガリウム(GaN)系材料で構成される基板上に形成される窒化ガリウム半導体装置としても良い。
Claims (3)
- 第1の電圧を与える第1の電源ラインと第2の電圧を与える第2の電源ラインとの間に直列に介挿され、相補的に動作する第1および第2のスイッチング部によって構成されるインバータと、
前記第1および第2のスイッチング部のそれぞれのスイッチング動作を制御する第1および第2の制御回路と、を備え、それらがモジュール化された電力用半導体装置であって、
前記第1のスイッチング部は、
前記第1の電源ラインにそれぞれの一方の主電極が接続され、前記インバータの出力ノードにそれぞれの他方の主電極が接続された第1のIGBTおよび第1のMOSFETを有し、
前記第2のスイッチング部は、
前記第2の電源ラインにそれぞれの一方の主電極が接続され、前記インバータの前記出力ノードにそれぞれの他方の主電極が接続された第2のIGBTおよび第2のMOSFETを有し、
前記電力用半導体装置の平面レイアウトにおいて、
前記第1の制御回路は、前記第1のスイッチング部に対向する位置に配置され、前記第1のIGBTおよび前記第1のMOSFETの一方は、前記第1の制御回路の近傍に配置され、他方はそれよりも前記第1の制御回路から遠い位置に配置され、
前記第2の制御回路は、前記第2のスイッチング部に対向する位置に配置され、前記第2のIGBTおよび前記第2のMOSFETの一方は、前記第2の制御回路の近傍に配置され、他方はそれよりも前記第2の制御回路から遠い位置に配置され、
前記第1のIGBTおよび前記第1のMOSFETのうち、一方のトランジスタのゲートには前記第1の制御回路から抵抗素子を介してゲート制御信号が与えられ、
前記第2のIGBTおよび前記第2のMOSFETのうち、一方のトランジスタのゲートには前記第2の制御回路から抵抗素子を介してゲート制御信号が与えられ、
前記第1の制御回路からの前記ゲート制御信号は、
前記第1の制御回路側から前記第1のIGBTおよび前記第1のMOSFETの近傍にかけて延在するダイパッドを介して前記第1のIGBTおよび前記第1のMOSFETのそれぞれの前記ゲートに与えられ、
前記第2の制御回路からの前記ゲート制御信号は、
前記第2の制御回路側から前記第2のIGBTおよび前記第2のMOSFETの近傍にかけて延在するダイパッドを介して前記第2のIGBTおよび前記第2のMOSFETのそれぞれの前記ゲートに与えられる、電力用半導体装置。 - 前記第1のIGBTおよび前記第1のMOSFETの少なくとも一方、および、
前記第2のIGBTおよび前記第2のMOSFETの少なくとも一方は、ワイドバンドギャップ半導体材料で構成される基板上に形成されるワイドバンドギャップ半導体デバイスである、請求項1記載の電力用半導体装置。 - 前記第1のMOSFETは、前記ワイドバンドギャップ半導体デバイスであり、
前記第1のIGBTは、逆導通IGBTであり、
前記第2のMOSFETは、前記ワイドバンドギャップ半導体デバイスであり、
前記第2のIGBTは、逆導通IGBTである、請求項2記載の電力用半導体装置。
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