JP5893387B2 - 電子装置及びその製造方法 - Google Patents

電子装置及びその製造方法 Download PDF

Info

Publication number
JP5893387B2
JP5893387B2 JP2011280907A JP2011280907A JP5893387B2 JP 5893387 B2 JP5893387 B2 JP 5893387B2 JP 2011280907 A JP2011280907 A JP 2011280907A JP 2011280907 A JP2011280907 A JP 2011280907A JP 5893387 B2 JP5893387 B2 JP 5893387B2
Authority
JP
Japan
Prior art keywords
wiring board
component mounting
resin
solder
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2011280907A
Other languages
English (en)
Japanese (ja)
Other versions
JP2013131669A5 (enExample
JP2013131669A (ja
Inventor
肇 飯塚
肇 飯塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2011280907A priority Critical patent/JP5893387B2/ja
Priority to US13/719,843 priority patent/US8994134B2/en
Publication of JP2013131669A publication Critical patent/JP2013131669A/ja
Publication of JP2013131669A5 publication Critical patent/JP2013131669A5/ja
Application granted granted Critical
Publication of JP5893387B2 publication Critical patent/JP5893387B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/50—Encapsulations or containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49833—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16237—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/16—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of types provided for in two or more different subclasses of H10B, H10D, H10F, H10H, H10K or H10N, e.g. forming hybrid circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H01L2924/1533—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
    • H01L2924/15331—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/804—Containers or encapsulations

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
JP2011280907A 2011-12-22 2011-12-22 電子装置及びその製造方法 Active JP5893387B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2011280907A JP5893387B2 (ja) 2011-12-22 2011-12-22 電子装置及びその製造方法
US13/719,843 US8994134B2 (en) 2011-12-22 2012-12-19 Electronic device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011280907A JP5893387B2 (ja) 2011-12-22 2011-12-22 電子装置及びその製造方法

Publications (3)

Publication Number Publication Date
JP2013131669A JP2013131669A (ja) 2013-07-04
JP2013131669A5 JP2013131669A5 (enExample) 2014-09-18
JP5893387B2 true JP5893387B2 (ja) 2016-03-23

Family

ID=48653705

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011280907A Active JP5893387B2 (ja) 2011-12-22 2011-12-22 電子装置及びその製造方法

Country Status (2)

Country Link
US (1) US8994134B2 (enExample)
JP (1) JP5893387B2 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10991669B2 (en) * 2012-07-31 2021-04-27 Mediatek Inc. Semiconductor package using flip-chip technology
TWI562295B (en) 2012-07-31 2016-12-11 Mediatek Inc Semiconductor package and method for fabricating base for semiconductor package
JP6415365B2 (ja) 2014-03-28 2018-10-31 株式会社ジェイデバイス 半導体パッケージ
US9576922B2 (en) * 2015-05-04 2017-02-21 Globalfoundries Inc. Silver alloying post-chip join
JP6591234B2 (ja) * 2015-08-21 2019-10-16 ルネサスエレクトロニクス株式会社 半導体装置
EP3154084A3 (en) * 2015-09-16 2017-04-26 MediaTek Inc. Semiconductor package using flip-chip technology
JP6662002B2 (ja) * 2015-11-27 2020-03-11 富士電機株式会社 半導体装置
KR101830938B1 (ko) * 2015-11-30 2018-04-04 하나 마이크론(주) 메탈 코어 솔더 볼 인터커넥터 팬-아웃 웨이퍼 레벨 패키지
WO2017095094A2 (ko) * 2015-11-30 2017-06-08 하나마이크론(주) 메탈 코어 솔더 볼 인터커넥터 팬-아웃 웨이퍼 레벨 패키지 및 그 제조 방법
TWI721469B (zh) * 2019-06-25 2021-03-11 欣興電子股份有限公司 堆疊結構及其製造方法
JP7251951B2 (ja) * 2018-11-13 2023-04-04 新光電気工業株式会社 半導体装置及び半導体装置の製造方法
CN112153799A (zh) * 2019-06-27 2020-12-29 欣兴电子股份有限公司 堆叠结构及其制造方法
US12051655B2 (en) * 2021-07-16 2024-07-30 Taiwan Semiconductor Manufacturing Company, Ltd. Package structure and method of forming the same

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001119006A (ja) * 1999-10-19 2001-04-27 Sony Corp 撮像デバイス及びその製造方法
JP2002261582A (ja) * 2000-10-04 2002-09-13 Matsushita Electric Ind Co Ltd 弾性表面波デバイスおよびその製造方法ならびにそれを用いた回路モジュール
JP2005340317A (ja) * 2004-05-25 2005-12-08 Sony Corp 半導体パッケージの製造方法、半導体パッケージ、および半導体パッケージの製造装置
JP2007059470A (ja) * 2005-08-22 2007-03-08 Sony Corp 半導体装置およびその製造方法
JP4184371B2 (ja) * 2005-10-03 2008-11-19 日本テキサス・インスツルメンツ株式会社 半導体チップ、半導体装置およびそれらの製造方法
JPWO2007069606A1 (ja) 2005-12-14 2009-05-21 新光電気工業株式会社 チップ内蔵基板の製造方法
JP2008294333A (ja) * 2007-05-28 2008-12-04 Multi:Kk プリント配線板の製造方法及びその方法を用いて得られるポッティングダムを備えるプリント配線板
JP5446623B2 (ja) * 2009-09-07 2014-03-19 大日本印刷株式会社 センサ素子モジュール
JP2011097026A (ja) * 2009-09-30 2011-05-12 Sanyo Electric Co Ltd 素子搭載用基板、半導体モジュール、光学モジュールおよびカメラモジュール
WO2011058879A1 (ja) * 2009-11-12 2011-05-19 日本電気株式会社 機能素子内蔵基板、機能素子内蔵基板の製造方法、及び、配線基板
JP5481724B2 (ja) * 2009-12-24 2014-04-23 新光電気工業株式会社 半導体素子内蔵基板

Also Published As

Publication number Publication date
US8994134B2 (en) 2015-03-31
US20130161776A1 (en) 2013-06-27
JP2013131669A (ja) 2013-07-04

Similar Documents

Publication Publication Date Title
JP5893387B2 (ja) 電子装置及びその製造方法
TWI550741B (zh) 四方扁平無接腳封裝及其製造方法
JP5993248B2 (ja) 電子部品内蔵基板及びその製造方法
US8242383B2 (en) Packaging substrate with embedded semiconductor component and method for fabricating the same
JP5421863B2 (ja) 半導体パッケージの製造方法
JP2010147153A (ja) 半導体装置及びその製造方法
JP6242231B2 (ja) 半導体装置及びその製造方法
CN103262236B (zh) 半导体元件中的无铅结构
KR20090103886A (ko) 전기 상호접속 구조물 및 그 형성 방법
JP2008218979A (ja) 電子パッケージ及びその製造方法
KR20040100949A (ko) 반도체 패키지의 제조 방법, 및 반도체 장치의 제조 방법
JP5015065B2 (ja) 配線基板
JP2009094434A (ja) 半導体装置およびその製造方法
WO2015198837A1 (ja) 半導体装置およびその製造方法
US20130277828A1 (en) Methods and Apparatus for bump-on-trace Chip Packaging
KR100871710B1 (ko) 플립 칩 패키지 및 그 패키지 제조방법
JP2008153492A (ja) 電子部品内蔵基板および電子部品内蔵基板の製造方法
JP2014150213A (ja) 半導体装置及び半導体装置の製造方法
JP3972209B2 (ja) 半導体装置及びその製造方法、回路基板並びに電子機器
JP2014229623A (ja) 半導体装置およびその製造方法
US9401345B2 (en) Semiconductor device package with organic interposer
US8430969B2 (en) Method for exposing and cleaning insulating coats from metal contact surfaces
JP2012138394A (ja) 半導体装置の製造方法
JP4591715B2 (ja) 半導体装置の製造方法
JP2007294560A (ja) 半導体装置およびその製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140731

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20140731

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20150420

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20150519

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20150625

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20160216

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20160224

R150 Certificate of patent or registration of utility model

Ref document number: 5893387

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150