JP5881752B2 - トランジスタアウトラインハウジング及びその製造方法 - Google Patents
トランジスタアウトラインハウジング及びその製造方法 Download PDFInfo
- Publication number
- JP5881752B2 JP5881752B2 JP2014006611A JP2014006611A JP5881752B2 JP 5881752 B2 JP5881752 B2 JP 5881752B2 JP 2014006611 A JP2014006611 A JP 2014006611A JP 2014006611 A JP2014006611 A JP 2014006611A JP 5881752 B2 JP5881752 B2 JP 5881752B2
- Authority
- JP
- Japan
- Prior art keywords
- housing
- passage
- connecting lead
- base
- lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 238000007789 sealing Methods 0.000 claims description 28
- 150000001875 compounds Chemical class 0.000 claims description 26
- 230000005540 biological transmission Effects 0.000 claims description 16
- 239000011521 glass Substances 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 33
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 14
- 239000000463 material Substances 0.000 description 7
- 239000002184 metal Substances 0.000 description 6
- 235000001674 Agaricus brunnescens Nutrition 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 238000003780 insertion Methods 0.000 description 3
- 230000037431 insertion Effects 0.000 description 3
- 125000006850 spacer group Chemical group 0.000 description 3
- 238000013461 design Methods 0.000 description 2
- 239000000835 fiber Substances 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000001228 spectrum Methods 0.000 description 2
- 239000005388 borosilicate glass Substances 0.000 description 1
- 229940125773 compound 10 Drugs 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- ZLVXBBHTMQJRSX-VMGNSXQWSA-N jdtic Chemical compound C1([C@]2(C)CCN(C[C@@H]2C)C[C@H](C(C)C)NC(=O)[C@@H]2NCC3=CC(O)=CC=C3C2)=CC=CC(O)=C1 ZLVXBBHTMQJRSX-VMGNSXQWSA-N 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000000565 sealant Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/06—Containers; Seals characterised by the material of the container or its electrical properties
- H01L23/08—Containers; Seals characterised by the material of the container or its electrical properties the material being an electrical insulator, e.g. glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
- H01L23/045—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads having an insulating passage through the base
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6605—High-frequency electrical connections
- H01L2223/6616—Vertical connections, e.g. vias
- H01L2223/6622—Coaxial feed-throughs in active or passive substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4801—Structure
- H01L2224/48011—Length
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85203—Thermocompression bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85205—Ultrasonic bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85205—Ultrasonic bonding
- H01L2224/85207—Thermosonic bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12043—Photo diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
- H01L2924/30111—Impedance matching
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Light Receiving Elements (AREA)
- Semiconductor Lasers (AREA)
- Amplifiers (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
2 基部
3 接続リード線
4 さらに別の線
5 デバイス
6 プレート
7 ボンディング・ワイヤー
8 リードスルー
9 シーリング・コンパウンド
10 電気端子
11 突出部
12 フレキシブル・プリント基板
13 接触点
14 プレート
15 中間プレート
16 担持プレート
17 増幅器アッセンブリ
18 フォトダイオード
19 ボンディング・ワイヤー
Claims (11)
- データ伝送用の受信機ダイオードまたは送信機ダイオードを備えるデバイス(5)を収容するための基部(2)を具備し、
前記デバイス(5)は、複数のボンディング・ワイヤー(7)を利用して、接続リード線(3)に接続されており、
前記接続リード線(3)は、前記基部(2)を貫通するパッセージ(8)内を通り、前記基部(2)から絶縁され、シーリング・コンパウンド(9)により前記基部(2)内に保持されている、TOハウジング(1)において、
前記各ボンディング・ワイヤー(7)の長さを短縮するために、少なくとも1本の接続リード線(3)は、前記デバイス側において前記パッセージ(8)内における断面に対して拡大された断面を有し、もしくは、前記パッセージ(8)内で非対称に配置され、もしくは、アングル加工されており、または、前記受信機ダイオードもしくは前記送信機ダイオードを備えた前記デバイス(5)は、前記パッセージ(8)の領域内に突出しており、
それにより生じるキャパシタンスの増大を少なくとも部分的に補償するために、少なくとも1本の接続リード線(3)が、電気的な接続側において、前記パッセージ(8)を越えてのびる余分な長さ部分を有しており、
前記ボンディング・ワイヤー(7)は、それ自体に関するインダクタンスLbを有し、前記パッセージ(8)の内の前記接続リード線(3)は、それ自体に関するキャパシタンスCdを有し、
前記パッセージ(8)を越えてのびる前記接続リード線(3)の余分な長さ部分(11)により、それに関するインダクタンスLuを有し、Lb−Cd−Lu回路が規定されており、前記Lb−Cd−Lu回路は、高周波域において、30Ωから80Ωの間のインピーダンスを有し、Lbが80pHから300pHの間、Cdが0.065pFから0.024pFの間、およびLuが80pHから300pHの間である、ことを特徴とするTOハウジング(1)。 - 前記接続リード線に接続されている1つの回路基板(12)が、前記基部(2)から離間されており、
さらに前記接続リード線が、前記余分な長さ部分(11)の領域においては、前記回路基板(12)と前記基部との間のエア・ギャップ中に配置されている、請求項1に記載のTOハウジング(1)。 - 前記シーリング・コンパウンド(9)はガラス・シーリング・コンパウンドであり、かつ、前記受信機ダイオードまたは送信機ダイオードを備えた前記デバイス(5)はチップとして構成されていることを特徴する、請求項1または2に記載のTOハウジング(1)。
- 前記TOハウジングに、受信機ダイオードまたは送信機ダイオードが実装されており、前記TOハウジングは、30Ωから120Ωの間のインピーダンスを有することを特徴とする、請求項1乃至3のいずれか1項に記載のTOハウジング(1)。
- 前記電気的な接続(10)は1つのフレキシブル・プリント基板(12)に接続されていることを特徴とする、請求項1乃至4のいずれか1項に記載のTOハウジング(1)。
- 前記少なくとも1本の接続リード線(3)は、0.1mmから3mmだけ前記パッセージ(8)を越えて突出していることを特徴とする、請求項1乃至5のいずれか1項に記載のTOハウジング(1)。
- 前記パッセージ(8)の前記断面の形状は、前記送信機ダイオードまたは受信機ダイオードに向かって、テーパ状または段付き形状に先細りしていることを特徴とする、請求項1乃至6のいずれか1項に記載のTOハウジング(1)。
- 前記TOハウジングは、受信機ダイオードまたは送信機ダイオードを実装しており、前記ボンディング・ワイヤー(7)は、1mm未満の長さを有することを特徴とする、請求項1乃至7のいずれか1項に記載のTOハウジング(1)。
- 毎秒20ギガビットを上回るデータ伝送速度でデータを伝送するように構成された、請求項1乃至8のいずれか1項に記載のTOハウジング(1)。
- 前記Lb−Cd−Lu回路は、高周波域において、40Ωから60Ωの間のインピーダンスを有することを特徴とする、請求項1乃至9のいずれか1項に記載のTOハウジング。
- TOハウジング(1)の製造方法であって、
データ伝送用の受信機ダイオードまたは送信機ダイオードを有するデバイス(5)を収容するための基部(2)を準備する工程と、
前記受信機ダイオードまたは送信機ダイオードを有する前記デバイス(5)を、ボンディング・ワイヤー(7)を利用して接続リード線(3)に接続する工程とを具備し、
前記接続リード線(3)は、前記基部(2)を貫通するパッセージ(8)を通じてのびており、シーリング・コンパウンド(9)により前記基部(2)内で密封されており、
前記ボンディング・ワイヤー(7)の長さを短縮するために、少なくとも1本の接続リード線は、前記デバイス(5)側において、前記パッセージ(8)内における断面に対して拡大された断面を有し、もしくは、前記パッセージ(8)内で非対称に配置され、もしくは、アングル加工されており、または、前記デバイス(5)は、前記パッセージ(8)の領域内に突出するように配置されており、
それにより生じるキャパシタンスの増大を少なくとも部分的に補償するために、少なくとも1本の接続リード線(3)が、前記パッセージ(8)を越えて伸びる余分な長さ部分を有するように設けられており、
前記ボンディング・ワイヤー(7)は、それ自体に関するインダクタンスLbを有し、前記パッセージ(8)の内の前記接続リード線(3)は、それ自体に関するキャパシタンスCdを有し、
前記パッセージ(8)を越えてのびる前記接続リード線(3)の余分な長さ部分(11)により、それに関するインダクタンスLuを有し、Lb−Cd−Lu回路が規定されており、前記Lb−Cd−Lu回路は、高周波域において、30Ωから80Ωの間のインピーダンスを有し、Lbが80pHから300pHの間、Cdが0.065pFから0.024pFの間、およびLuが80pHから300pHの間である、TOハウジングの製造方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102013100510 | 2013-01-18 | ||
DE102013100510.1 | 2013-01-18 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2016016990A Division JP2016103657A (ja) | 2013-01-18 | 2016-02-01 | トランジスタアウトラインハウジング及びその製造方法 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2014138190A JP2014138190A (ja) | 2014-07-28 |
JP2014138190A5 JP2014138190A5 (ja) | 2016-01-28 |
JP5881752B2 true JP5881752B2 (ja) | 2016-03-09 |
Family
ID=51064363
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2014006611A Active JP5881752B2 (ja) | 2013-01-18 | 2014-01-17 | トランジスタアウトラインハウジング及びその製造方法 |
JP2016016990A Pending JP2016103657A (ja) | 2013-01-18 | 2016-02-01 | トランジスタアウトラインハウジング及びその製造方法 |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2016016990A Pending JP2016103657A (ja) | 2013-01-18 | 2016-02-01 | トランジスタアウトラインハウジング及びその製造方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US9159634B2 (ja) |
JP (2) | JP5881752B2 (ja) |
KR (1) | KR101640298B1 (ja) |
CN (1) | CN103943574B (ja) |
DE (1) | DE102013114547B4 (ja) |
TW (1) | TWI580003B (ja) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6715601B2 (ja) * | 2016-01-08 | 2020-07-01 | 新光電気工業株式会社 | 光半導体素子用パッケージ |
US10257932B2 (en) * | 2016-02-16 | 2019-04-09 | Microsoft Technology Licensing, Llc. | Laser diode chip on printed circuit board |
JP6929113B2 (ja) | 2017-04-24 | 2021-09-01 | 日本ルメンタム株式会社 | 光アセンブリ、光モジュール、及び光伝送装置 |
DE102017123342A1 (de) | 2017-10-09 | 2019-04-11 | Schott Ag | TO-Gehäuse mit hoher Reflexionsdämpfung |
US10319654B1 (en) * | 2017-12-01 | 2019-06-11 | Cubic Corporation | Integrated chip scale packages |
KR20240015727A (ko) | 2018-04-19 | 2024-02-05 | 소니 세미컨덕터 솔루션즈 가부시키가이샤 | 반도체 레이저 구동 장치 및 그 제조 방법 |
JP7249745B2 (ja) * | 2018-08-03 | 2023-03-31 | 日本ルメンタム株式会社 | 光サブアッセンブリ及び光モジュール |
JP7245620B2 (ja) * | 2018-08-03 | 2023-03-24 | 日本ルメンタム株式会社 | 光サブアッセンブリ及び光モジュール |
DE102018120893B4 (de) | 2018-08-27 | 2022-01-27 | Schott Ag | TO-Gehäuse mit einer Durchführung aus Glas |
DE102018120895A1 (de) | 2018-08-27 | 2020-02-27 | Schott Ag | TO-Gehäuse mit einem Erdanschluss |
JP7240160B2 (ja) * | 2018-12-11 | 2023-03-15 | 新光電気工業株式会社 | ステム |
CN112585743B (zh) * | 2018-12-26 | 2023-10-13 | 京瓷株式会社 | 布线基体、电子部件收纳用封装以及电子装置 |
JP7398877B2 (ja) * | 2019-04-18 | 2023-12-15 | 新光電気工業株式会社 | 半導体装置用ステム及び半導体装置 |
US11973312B2 (en) * | 2019-07-02 | 2024-04-30 | Mitsubishi Electric Corporation | Semiconductor laser device |
KR102495148B1 (ko) * | 2020-11-30 | 2023-02-07 | 주식회사 오이솔루션 | To-can 타입 반도체 패키지를 위한 임피던스 신호선의 구조 |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4951011A (en) | 1986-07-24 | 1990-08-21 | Harris Corporation | Impedance matched plug-in package for high speed microwave integrated circuits |
JPS64817A (en) | 1987-03-11 | 1989-01-05 | Fujitsu Ltd | Logic circuit |
JPH0287559A (ja) * | 1988-09-26 | 1990-03-28 | Hitachi Ltd | 半導体ケース |
JPH05343117A (ja) * | 1992-06-05 | 1993-12-24 | Shinko Electric Ind Co Ltd | 電子部品用ガラス端子 |
JPH11231173A (ja) | 1998-02-12 | 1999-08-27 | Fujitsu Ltd | 高速動作可能な光デバイス |
JP3509070B2 (ja) * | 2000-08-11 | 2004-03-22 | 松下電器産業株式会社 | パッケージを用いた電子装置 |
US7019335B2 (en) * | 2001-04-17 | 2006-03-28 | Nichia Corporation | Light-emitting apparatus |
DE10221706B4 (de) | 2002-05-16 | 2006-04-20 | Schott Ag | TO-Gehäuse für Hochfrequenzanwendungen |
US7061949B1 (en) * | 2002-08-16 | 2006-06-13 | Jds Uniphase Corporation | Methods, apparatus, and systems with semiconductor laser packaging for high modulation bandwidth |
JP3990674B2 (ja) * | 2004-02-10 | 2007-10-17 | 日本オプネクスト株式会社 | 光送信機 |
KR101171186B1 (ko) * | 2005-11-10 | 2012-08-06 | 삼성전자주식회사 | 고휘도 발광 다이오드 및 이를 이용한 액정 표시 장치 |
JP4923542B2 (ja) * | 2005-11-30 | 2012-04-25 | 三菱電機株式会社 | 光素子用ステムとこれを用いた光半導体装置 |
JP2007227724A (ja) | 2006-02-24 | 2007-09-06 | Mitsubishi Electric Corp | 半導体発光装置 |
JP4970837B2 (ja) * | 2006-04-25 | 2012-07-11 | 日本オプネクスト株式会社 | 受光素子モジュール |
JP2008130834A (ja) | 2006-11-21 | 2008-06-05 | Mitsubishi Electric Corp | 光モジュール |
JP2009054982A (ja) * | 2007-07-27 | 2009-03-12 | Kyocera Corp | 電子部品搭載用パッケージおよびそれを用いた電子装置 |
JP5380724B2 (ja) | 2008-03-27 | 2014-01-08 | 新光電気工業株式会社 | 光半導体素子用パッケージ及びその製造方法 |
JP5409432B2 (ja) * | 2010-02-23 | 2014-02-05 | 京セラ株式会社 | 電子部品搭載用パッケージおよびそれを用いた電子装置 |
JP5616178B2 (ja) | 2010-09-16 | 2014-10-29 | 京セラ株式会社 | 電子部品搭載用パッケージおよび通信用モジュール |
JP5703522B2 (ja) * | 2010-09-30 | 2015-04-22 | セイコーインスツル株式会社 | パッケージ、パッケージ製造方法、圧電振動子 |
-
2013
- 2013-12-19 DE DE102013114547.7A patent/DE102013114547B4/de active Active
-
2014
- 2014-01-08 TW TW103100633A patent/TWI580003B/zh active
- 2014-01-16 KR KR1020140005429A patent/KR101640298B1/ko active IP Right Grant
- 2014-01-17 CN CN201410022616.9A patent/CN103943574B/zh active Active
- 2014-01-17 JP JP2014006611A patent/JP5881752B2/ja active Active
- 2014-01-17 US US14/158,690 patent/US9159634B2/en active Active
-
2016
- 2016-02-01 JP JP2016016990A patent/JP2016103657A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
DE102013114547B4 (de) | 2020-01-16 |
TWI580003B (zh) | 2017-04-21 |
JP2014138190A (ja) | 2014-07-28 |
KR101640298B1 (ko) | 2016-07-15 |
KR20140093623A (ko) | 2014-07-28 |
CN103943574A (zh) | 2014-07-23 |
TW201438184A (zh) | 2014-10-01 |
JP2016103657A (ja) | 2016-06-02 |
DE102013114547A1 (de) | 2014-07-24 |
US20140217570A1 (en) | 2014-08-07 |
US9159634B2 (en) | 2015-10-13 |
CN103943574B (zh) | 2017-11-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5881752B2 (ja) | トランジスタアウトラインハウジング及びその製造方法 | |
JP4923542B2 (ja) | 光素子用ステムとこれを用いた光半導体装置 | |
JP5104251B2 (ja) | 光モジュール | |
KR101430634B1 (ko) | 광 모듈 | |
JP2007088233A (ja) | 光モジュール | |
JP5504712B2 (ja) | 高速伝送用回路基板の接続構造 | |
JP2009152472A (ja) | 光伝送モジュール | |
JP2019046922A (ja) | 光モジュール及び光伝送装置 | |
JP6272576B1 (ja) | 光モジュール及びcanパッケージ | |
US11503715B2 (en) | Optical module | |
CN111766664A (zh) | 一种光发射组件及光模块 | |
US8008761B2 (en) | Optical semiconductor apparatus | |
JP7057357B2 (ja) | 光モジュール | |
JP4828103B2 (ja) | 光送受信モジュール | |
JP4699138B2 (ja) | 光半導体素子モジュール及びその製造方法 | |
US5926308A (en) | High-speed optical modulator module | |
JP6228560B2 (ja) | 高周波伝送線路および光回路 | |
JP2004335584A (ja) | 半導体パッケージ | |
JP2005191347A (ja) | 半導体光素子用チップキャリア、光モジュール、及び光送受信器 | |
CN114556724B (zh) | 光半导体装置 | |
CN113540956B (zh) | 一种同轴光电器件及其底座 | |
US11398866B2 (en) | Optical semiconductor device, optical transmission module, and optical transceiver | |
JP6008905B2 (ja) | 光半導体装置 | |
KR19980082579A (ko) | 다중 채널 광송수신 모듈 | |
CN111916419A (zh) | 用于光电模块的电耦合配件和方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20141022 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20141104 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20150203 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150303 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20150903 |
|
A524 | Written submission of copy of amendment under article 19 pct |
Free format text: JAPANESE INTERMEDIATE CODE: A524 Effective date: 20151203 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20160105 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20160202 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5881752 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |